Bump Terminals for Multilayer Capacitor Vibration Damping
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Solution Overview
Problem
Multilayer electronic components generate acoustic noise and high-frequency vibrations due to piezoelectric deformations, which can be misinterpreted as device malfunctions and degrade audio quality, especially when the frequency exceeds 20 kHz, and the noise is amplified by the structure of solders connecting external electrodes to the circuit board.
Innovation Solution
A multilayer electronic component design featuring bump terminals made of insulators with conductive layers on the capacitor body's external electrodes, which absorb vibrations and reduce noise by spacing the capacitor body from the circuit board, thereby minimizing the transfer of acoustic noise and high-frequency vibrations, with specific dimensions and configurations for the band and connected portions to optimize adhesion and vibration absorption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the volume and height of the solders are increased to improve connection strength between external electrodes and circuit board, then the connection reliability is improved, but the vibrations of the multilayer capacitor are more easily transferred to the circuit board, increasing the magnitude of acoustic noise
Solution Approach 1:
The patent introduces a damping material as an intermediary substance between the solder and the multilayer capacitor body. This damping material absorbs and dissipates vibrations, preventing them from being transferred to the circuit board through the solder connection, thereby reducing acoustic noise while maintaining connection reliability
Solution Approach 2:
The patent employs a composite structure combining solder with damping material properties. The damping material may be a composite formulation designed to provide both mechanical bonding capability and vibration damping characteristics, allowing it to serve dual functions of connection and noise reduction
2Reliability
If the dielectric material has piezoelectric properties to be synchronized and deformed with applied voltage to achieve capacitive function, then the electrical functionality is improved, but displacement of the dielectric material becomes vibrations transferred to circuit board through solders, generating acoustic noise
Solution Approach 1:
The damping material serves as a mediator between the piezoelectric dielectric material and the external environment (circuit board). It allows the dielectric material to perform its piezoelectric function of deforming with applied voltage while preventing this deformation from being transmitted as audible vibrations to the circuit board
Solution Approach 2:
The patent converts the harmful piezoelectric vibrations into beneficial heat energy through the damping material. The damping material is designed to dissipate the mechanical energy of vibrations through internal friction and hysteresis, transforming the harmful acoustic noise into harmless thermal energy
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces acoustic noise and high-frequency vibrations, improving the reliability and quality of electronic devices by minimizing noise transfer and enhancing the structural integrity of the multilayer electronic components.
Implementation Method 1
first and second bump terminals formed of insulators, having conductive layers formed on surfaces thereof, and disposed on the first and second band portions, respectively... absorb vibrations and reduce noise by spacing the capacitor body from the circuit board
Implementation Method 2
a dielectric material may have piezoelectric properties to be thus synchronized and deformed with a voltage applied thereto
Data Source
AI summary
A multilayer electronic component includes: a capacitor body including an active region including first and second internal electrodes and upper and lower cover regions; first and second external electrodes including first and second connected portions connected to the first and second internal electrodes and first and second band portions, respectively; and first and second bump terminals having conductive layers and disposed on the first and second band portions, respectively, wherein BW/3≤G≤BW and T/5<ET<T/2, where BW is a width of each of the first and second band portions, T is a thickness of each of the first and second connected portions, G is a width of each of the first and second bump terminals, and ET is a thickness of each of the first and second bump terminals.