Bumpless Build-Up Layer Package With Integrated Heat Spreader

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Solution Overview

Problem

As integrated circuit chips are miniaturized and crowded into smaller packages, they generate significant heat, posing challenges in effective heat dissipation within the limited geometries of modern packaging solutions.

Innovation Solution

The integration of a heat spreader into the package, which is electrically conductive but insulated from the active region, coupled with thermal interface materials and conductive traces, allows for efficient heat dissipation without the use of traditional bumps, enabling a bumpless build-up layer package configuration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If multiple chips are crowded into smaller packages for miniaturization, then the compactness and integration density are improved, but heat dissipation becomes insufficient due to limited geometries

Engineering Contradiction:
Improvepackage sizeVSAvoidheat dissipation
Core Design Contradiction:
Volume of moving objectVSTemperature

Solution Approach 1:

The patent introduces a heat spreader layer positioned between the integrated circuit chip and the package substrate, creating a new thermal management dimension. This heat spreader extends laterally beyond the chip edges to provide increased heat dissipation surface area without increasing the overall package footprint, effectively adding thermal management capability in the lateral dimension while maintaining compact vertical integration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The heat spreader acts as an intermediary thermal management component between the heat-generating chip and the package substrate. It receives heat from the chip through thermal contact and distributes it laterally across a larger area, mediating the thermal transfer and preventing localized overheating while enabling effective heat dissipation within the constrained package geometry.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If traditional bump connections are used for chip packaging, then electrical connectivity is achieved, but the manufacturing complexity and sensitivity to misalignment increase

Engineering Contradiction:
Improveelectrical connectivityVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent removes the traditional bump connection structure from the packaging process. Instead of using solder bumps that require precise alignment and complex reflow soldering processes, the invention extracts this complexity by implementing direct wire bonding or flip-chip bonding to pads on the package substrate, eliminating the need for bump formation and reducing manufacturing steps while maintaining reliable electrical connectivity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent employs a simplified interconnection approach where electrical connections are established through direct bonding or wire bonding techniques that replicate the connectivity function of bumps without requiring the complex bump formation process. This copying of the electrical connection function through a simpler method reduces manufacturing complexity and improves yield.

Inventive Principle:
Principle #26Copying

3Temperature

If heat spreader is integrated into the package, then thermal conductivity and heat dissipation are improved, but the device complexity increases due to additional components

Engineering Contradiction:
Improvethermal conductivityVSAvoidpackage structure
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The patent merges the heat spreader function with the package substrate structure by integrating the heat spreader as a layer within the package assembly. Rather than adding a completely separate component, the heat spreader is combined with existing package layers, creating a multi-functional structure that provides both mechanical support and thermal management capabilities, thereby reducing the net increase in device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The heat spreader is designed to serve multiple functions: it provides thermal management by conducting and distributing heat, acts as a mechanical support layer within the package, and can serve as a mounting surface for additional components. This multi-functionality reduces the need for separate dedicated components, thereby minimizing the increase in overall device complexity while achieving improved thermal conductivity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively manages heat dissipation across the chip, reducing thermal warpage and enhancing the thermal conductivity between the chip and the package, thereby improving the reliability and performance of integrated circuit packages in compact form factors.

Implementation Method 1

a heat spreader having an upper heat spreader surface, a lower heat spreader surface parallel to the upper heat spreader surface, and at least one heat spreader side, the heat spreader disposed on the lower surface of the microelectronic die in thermal communication with the inactive region of the die

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

disposing a thermal interface material between, and in thermal communication with, the upper heat spreader surface and the lower die surface

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS9520376B2Bumpless build-up layer package including an integrated heat spreader
Publication Date: 2016.12.13 INTEL CORP
  • US9520376B2 patent drawing
  • US9520376B2 patent drawing
  • US9520376B2 patent drawing

AI summary

An example includes a die package including a microelectronic die having a lower die surface, an upper die surface parallel to the lower die surface, and a die side, the microelectronic die including an active region and an inactive region. The example optionally includes a heat spreader having a lower heat spreader surface, an upper heat spreader surface parallel to the lower heat spreader surface, and at least one heat spreader side, the heat spreader disposed on the upper surface of the microelectronic die in thermal communication with the inactive region of the die and electrically insulated from the active region. The example optionally includes an encapsulation material encapsulating the die side and the heat spreader side and lower heat spreader surface, the encapsulation material including a lower surface substantially parallel to the die lower surface and an upper surface substantially parallel to the die upper surface.