Buried Back-Contact Solar Cell Layout for Leakage and Passivation
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Solution Overview
Problem
Existing back contact structures for solar cells face challenges with high trench width control requirements and poor passivation effects, leading to electric leakage and reduced photovoltaic conversion efficiency.
Innovation Solution
A back contact structure featuring a silicon substrate with recesses, where P-type and N-type doped regions are separated by an ultra-condensed trench, and a multi-layer dielectric structure for improved passivation and carrier collection, allowing for better width control and enhanced inner back reflection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an ultra-condensed trench is formed to separate P-type and N-type doped regions, then electric leakage is prevented and open-circuit voltage is improved, but trench width control becomes highly difficult and preparation becomes complex
Solution Approach 1:
The patent divides the back surface into multiple recesses that are segmented and distributed across the surface. Each recess contains either P-type or N-type doped regions, creating spatial separation between opposite polarity regions. This segmentation approach eliminates the need for precise ultra-narrow trenches while still preventing electric leakage through physical isolation of doped regions.
Solution Approach 2:
Instead of relying solely on horizontal trench separation, the patent utilizes vertical depth dimension by forming recesses into the silicon substrate. The recesses provide three-dimensional isolation where doped regions are separated both horizontally across the surface and vertically through the substrate depth, reducing the stringency of width control requirements.
2Device complexity
If a single dielectric layer is used for passivation, then the structure is simple, but the passivation effect and inner back reflection effect are poor
Solution Approach 1:
The patent employs a composite dielectric layer structure consisting of multiple dielectric layers with different material compositions and optical properties. This multi-layer configuration provides superior passivation by combining the benefits of different materials, such as varying bandgaps and interface quality, while also enhancing inner back reflection through optimized optical impedance matching between layers.
Solution Approach 2:
Different dielectric layers are positioned at specific locations and depths within the recesses to provide localized passivation and reflection functions. The multi-layer structure allows optimization of each layer's thickness and material properties to address specific local requirements for carrier passivation and light reflection at different interfaces.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces current leakage, improves passivation effects, and increases photovoltaic conversion efficiency by facilitating multi-dimensional carrier collection and enhancing short-circuit current density.
Implementation Method 1
a first dielectric layer disposed on the back surface of the silicon substrate; a second dielectric layer disposed between the plurality of first doped regions and the plurality of second doped regions
Implementation Method 2
a plurality of first doped regions disposed on the first dielectric layer and disposed inside the plurality of recesses; a plurality of second doped regions disposed on the first dielectric layer and disposed outside the plurality of recesses
Implementation Method 3
using the single dielectric layer for passivation has a relatively poor passivation effect and a poor inner back reflection effect
Data Source
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AI summary
A back contact structure includes: a silicon substrate including a back surface including a plurality of recesses disposed at intervals; a first dielectric layer disposed on the back surface of the silicon substrate; a plurality of first doped regions disposed on the first dielectric layer and disposed inside the plurality of recesses; a plurality of second doped regions disposed on the first dielectric layer and disposed outside the plurality of recesses; a second dielectric layer disposed between the first doped regions and the second doped regions; and a conductive layer disposed on the first plurality of doped regions and the plurality of second doped regions.