Buried Bit Line Anti-Fuse for Semiconductor Reliability
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Solution Overview
Problem
The existing methods for repairing semiconductor devices using fuses are limited as they cannot be applied to packaged devices, and anti-fuse technology faces issues with increased area occupation and reliability due to gate insulation film breakdown, leading to reduced productivity and device stability.
Innovation Solution
A semiconductor device is formed with a line pattern, device isolation film, and a bit line connected to a sidewall contact, where the oxide film is ruptured by a bias voltage, preventing gate insulation film breakdown and maintaining device reliability, and a buried bit line with a doped polysilicon layer is used to increase reliability and stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate size is increased to enhance reliability and stability of the anti-fuse, then the reliability and stability improve, but the area occupied by the anti-fuse increases, resulting in reduced productivity
Solution Approach 1:
The patent transitions from a planar gate structure to a vertical gate structure, changing the spatial dimension of the anti-fuse device. This vertical configuration allows the anti-fuse to achieve enhanced reliability through increased gate control without proportionally increasing the chip area, as the gate extends in the vertical direction rather than occupying more horizontal space. This dimensional change resolves the contradiction between reliability and productivity.
2Ease of manufacture
If the method using fuse is used to repair semiconductor devices, then the repair process can be performed on wafer level, but it cannot be applied to packaged semiconductor devices
Solution Approach 1:
The patent designs the anti-fuse structure and programming method to be universally applicable to both wafer-level and packaged semiconductor devices. The vertical gate anti-fuse structure can be programmed after device packaging by applying voltage through the contact plug, enabling repair operations on packaged devices. This multi-functionality resolves the contradiction between ease of manufacture and adaptability to different device stages.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively increases the reliability and stability of semiconductor devices by preventing gate insulation film breakdown and reducing the area occupied by the anti-fuse, while allowing for efficient repair of defective cells in packaged memory devices.
Implementation Method 1
the oxide film formed over the line pattern in the contact part is ruptured by a bias voltage applied to the bit line
Implementation Method 2
a buried bit line with a doped polysilicon layer is used to increase reliability and stability
Data Source
AI summary
A method for forming a semiconductor device is disclosed. An anti-fuse is formed at a buried bit line such that the area occupied by the anti-fuse is smaller than that of a conventional planar-gate-type anti-fuse, and a breakdown efficiency of an insulation film is increased. This results in an increase in reliability and stability of the semiconductor device. A semiconductor device includes a line pattern formed over a semiconductor substrate, a device isolation film formed at a center part of the line pattern, a contact part formed at both sides of the line pattern, configured to include an oxide film formed over the line pattern, and a bit line formed at a bottom part between the line patterns, and connected to the contact part.