Buried Bit Line Fabrication with Germanium Barrier
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Solution Overview
Problem
Conventional semiconductor device fabrication technologies face challenges in reducing parasitic capacitance between adjacent buried bit lines and preventing body lines from leaning during high aspect ratio etching, while also addressing issues with metal silicide agglomeration and breakage.
Innovation Solution
The solution involves forming buried bit lines in the recessed sidewalls of body lines with a barrier layer containing germanium to reduce parasitic capacitance and prevent leaning, using a process that includes forming supporters to stabilize the body lines and employing a metal silicide with a barrier layer to prevent agglomeration and breakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If high aspect ratio etching is performed to form body lines, then body lines can be formed with sufficient height, but the body lines are likely to lean
Solution Approach 1:
The patent applies preliminary action by forming a support structure (mandrel) in the trench before performing the high aspect ratio etching to form body lines. This mandrel provides mechanical support during the etching process, preventing the body lines from leaning while still achieving the required height. The support structure is removed after etching, leaving vertically aligned body lines.
2Ease of manufacture
If adjacent buried bit lines are brought into contact with body lines, then direct contact is achieved, but parasitic capacitance between adjacent buried bit lines increases
Solution Approach 1:
The patent introduces an intermediary approach by forming a dielectric layer between adjacent buried bit lines. This dielectric layer acts as a mediator that prevents direct electrical contact between adjacent bit lines, thereby reducing parasitic capacitance while still allowing each bit line to contact its corresponding body line through controlled openings in the dielectric layer.
3Reliability
If metal silicide is used to form buried bit lines, then conductivity is improved, but agglomeration and breakage occur
Solution Approach 1:
The patent applies composite materials by forming a layered structure consisting of a barrier layer (such as titanium nitride or tantalum nitride) combined with metal silicide. The barrier layer prevents agglomeration and provides structural stability, while the metal silicide layer provides high conductivity. This composite structure maintains both the electrical performance and compositional stability required for reliable buried bit lines.
Data Source
AI summary
A semiconductor device includes body lines, formed substantially perpendicular to a substrate, and having recessed sidewalls, buried bit lines, buried in the recessed sidewalls, and including a metal silicide, and a barrier layer interposed between each of the buried bit lines and the body lines corresponding thereto, and containing germanium.