Buried Capacitor in Contact Level for Semiconductor Devices
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Solution Overview
Problem
In integrated circuits, the reduction in size of transistors increases dynamic power consumption and requires complex processes for capacitor formation, especially in deep trench or metallization systems, leading to increased process complexity and interconnect complexity.
Innovation Solution
Capacitors are formed in the contact level of semiconductor devices with one electrode in the active semiconductor region and a buried electrode in the dielectric material, allowing direct connection to transistors and efficient capacitance adjustment using appropriate dielectric materials, reducing the need for additional interconnect structures and complex patterning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If capacitors are formed in deep trench or metallization systems, then capacitor functionality is achieved, but process complexity and interconnect complexity increase
Solution Approach 1:
The patent merges the capacitor formation process with the contact hole formation process. The same contact holes that connect transistors to interconnect layers are used to fill with conductive material to form capacitor electrodes. This combines two separate fabrication processes into one, eliminating the need for separate capacitor formation steps and reducing overall process complexity.
Solution Approach 2:
The contact holes serve multiple functions: they act as interconnect pathways for transistor connections and simultaneously serve as the capacitor electrode structure. The conductive material filling these holes provides both electrical connection functionality and capacitor electrode functionality, reducing the need for dedicated capacitor-specific interconnect structures.
2Speed
If transistor size is reduced, then switching speed increases, but dynamic power consumption increases
Solution Approach 1:
The patent introduces decoupling capacitors as intermediary elements between the power supply and the transistor circuits. These capacitors store electrical energy and provide it during transistor switching operations, thereby reducing the instantaneous power demand and lowering dynamic power consumption while maintaining high switching speeds.
Solution Approach 2:
The patent changes the electrical parameters of the circuit by introducing capacitive elements that alter the power delivery characteristics. The capacitors modify the voltage and current profiles during switching events, enabling faster transitions with reduced energy consumption through optimized charge discharge cycles.
3Object-affected harmful factors
If decoupling capacitors are provided in integrated circuits, then switching noise is reduced, but additional process modules are required
Solution Approach 1:
The patent combines the decoupling capacitor formation with the existing contact hole fabrication process. By using the same etching and filling steps for both contact holes and capacitor electrodes, the noise-reducing capacitor functionality is achieved without adding separate process modules, thereby eliminating the stated worsening effect.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration achieves a space-efficient and high-density memory area with reduced process complexity, enabling high bit density in dynamic RAM areas without complex process strategies, while maintaining superior capacitor integrity.
Implementation Method 1
a capacitor dielectric material may be formed on a shared transistor region of a first transistor and a second transistor
Implementation Method 2
forming a capacitor dielectric material on a first contact region that is formed in an active region of a semiconductor device
Data Source
AI summary
In a semiconductor device, capacitors may be formed so as to be in direct contact with a transistor by using a shared transistor region, such as a drain region or a source region of closely spaced transistors, as one capacitor electrode, while the other capacitor electrode is provided in the form of a buried electrode in the dielectric material of the contact level. To this end, dielectric material may be deposited so as to reliably form a void, wherein, at any appropriate manufacturing stage, a capacitor dielectric material may be provided so as to separate the capacitor electrodes.