Buried Capacitor in Semiconductor Die for High Density
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional capacitors in integrated circuits face challenges such as limited capacitance per unit area, non-linearity, high temperature coefficients, and low breakdown voltage, leading to area inefficiencies and the need for external discrete capacitors.
Innovation Solution
A semiconductor die with a buried capacitor design, featuring a conductive material and dielectric layer within a cavity in the semiconductor substrate, allowing for a high-density capacitor with improved area efficiency and reduced series resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If MOS capacitors are used to achieve high capacitance density, then capacitance per unit area is improved, but linearity deteriorates and breakdown voltage decreases
Solution Approach 1:
The patent employs a composite capacitor structure combining metal plates with high-k dielectric materials (such as barium strontium titanate or lead zirconate titanate) to achieve high capacitance density while maintaining reliability. This composite approach allows the capacitor to benefit from the high permittivity of ceramic materials without the limitations of MOS capacitor structures, thereby improving both capacitance density and operational reliability simultaneously.
2Reliability
If MIM or MOM capacitors are used to improve linearity and breakdown voltage, then reliability is improved, but capacitance per unit area deteriorates
Solution Approach 1:
The patent fundamentally changes the dielectric parameter by introducing high-k materials with permittivity values significantly higher than traditional silicon dioxide or silicon nitride. This parameter change enables the capacitor to achieve high capacitance density (comparable to or exceeding MOS capacitors) while maintaining the structural advantages of MIM/MOM capacitors that provide improved linearity and breakdown voltage characteristics.
3Reliability
If external discrete capacitors are used to achieve required capacitance values, then circuit performance is improved, but device complexity and area consumption increase
Solution Approach 1:
The patent merges the capacitor structure directly into the semiconductor substrate, integrating what would traditionally be external discrete components into the chip itself. This consolidation eliminates the need for separate capacitor packages and interconnections, reducing overall device complexity, decreasing area consumption, and improving manufacturing efficiency while maintaining the required circuit performance through optimized high-k dielectric designs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The buried capacitor design achieves higher capacitance density per unit area compared to traditional MIM capacitors, enhancing area efficiency and reducing manufacturing costs while maintaining structural stability without the need for bonding operations.
Implementation Method 1
the conductive material at least partially filling the cavity forms a first plate of a capacitor and the semiconductor substrate forms a second plate of the capacitor
Implementation Method 2
a capacitor dielectric layer lining walls of the cavity
Data Source
AI summary
A semiconductor body includes a front side and a back side and is configured to support an electronic circuit. A buried region is provided in the semiconductor body at a location between the electronic circuit and the back side. The buried region includes a layer of conductive material and a dielectric layer, where the dielectric layer is arranged between the layer of conductive material and the semiconductor body. A conductive path extends between the buried region and the front side to form a path for electrical access to the layer of conductive material. A capacitor is thus formed with the layer of conductive material providing a capacitor plate and the dielectric layer providing the capacitor dielectric. A further capacitor plate is provided by the semiconductor body, or by a further layer of conductive material in the buried region.