Buried Cavity Isolation for Semiconductor Breakdown Voltage

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Solution Overview

Problem

In silicon devices such as IGBTs, diodes, and MOSFETs, existing technologies face challenges in meeting requirements for minimum breakdown voltages, functional safety, and maximum leakage currents, necessitating the development of an integrated circuit with enhanced electrical isolation and manufacturing methods.

Innovation Solution

The integrated circuit incorporates a cavity buried in a semiconductor body with a trench isolation structure providing lateral electric isolation, formed through processes like high-dose particle implantation or self-organized recrystallization, to enhance breakdown voltage and reduce leakage currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a cavity is buried in a semiconductor body to improve breakdown voltage, then electrical isolation is enhanced, but device complexity increases

Engineering Contradiction:
Improvebreakdown voltageVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a nested structure where a cavity is buried within the semiconductor body, and a trench isolation structure is formed within the cavity. This nested arrangement provides multiple levels of electrical isolation, enhancing breakdown voltage while maintaining a compact footprint. The trench isolation structure is positioned inside the cavity, creating a hierarchical isolation system that addresses the technical contradiction by providing enhanced reliability without proportionally increasing overall device complexity.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent transitions from two-dimensional planar isolation to three-dimensional vertical isolation by burying a cavity within the semiconductor body. This dimensional change allows electrical isolation to occur in the vertical dimension rather than only in the planar dimension, thereby enhancing breakdown voltage performance. The trench isolation structure extending into the cavity further exploits the third dimension to provide additional isolation pathways, resolving the contradiction between improved reliability and device complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If a trench isolation structure is formed to reduce leakage currents, then electrical isolation is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveleakage currentVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent performs preliminary actions by first forming the cavity through high-dose particle implantation or self-organized recrystallization before forming the trench isolation structure. This sequence allows the cavity to serve as a pre-prepared isolation region that guides subsequent trench formation. The preliminary cavity creation simplifies the overall manufacturing process by providing a defined space for the trench isolation structure, thereby reducing manufacturing complexity while achieving improved leakage current performance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs self-organized recrystallization as a self-service mechanism where the semiconductor material automatically reorganizes itself during thermal processing to form the cavity structure without requiring complex external intervention. This self-organizing behavior reduces manufacturing complexity by eliminating the need for precise lithographic patterning and etching steps that would otherwise be required to create the cavity, while still achieving the desired trench isolation structure for leakage current reduction.

Inventive Principle:
Principle #25Self-service

3Reliability

If high-dose particle implantation is used to form a cavity, then breakdown voltage increases, but manufacturing precision requirements increase

Engineering Contradiction:
Improvebreakdown voltageVSAvoidmanufacturing precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent utilizes parameter changes in the particle implantation process, specifically adjusting the dose, energy, and angle of particle bombardment, to control cavity formation. By optimizing these parameters, the process achieves consistent cavity depths and volumes that provide reliable breakdown voltage enhancement. The parameter changes approach allows for process window optimization, reducing manufacturing precision requirements compared to methods requiring exact geometric control, while still achieving the desired electrical isolation performance.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively increases breakdown voltage and reduces leakage currents, ensuring the integrated circuit meets target product specifications for silicon devices like IGBTs and MOSFETs, thereby improving their performance and reliability.

Implementation Method 1

a trench isolation structure configured to provide a lateral electric isolation of the active area portion

Methodology Applied
Scientific EffectElectrical isolation: Electrical Resistance

Implementation Method 2

forming a cavity buried in a semiconductor body below a first surface of the semiconductor body

Methodology Applied
Scientific EffectParticle implantation: Ion Implantation

Implementation Method 3

self-organized recrystallization caused by silicon surface migration during an annealing process

Methodology Applied
Scientific EffectRecrystallization: Annealing

Data Source

PatentUS10553675B2Isolation of semiconductor device with buried cavity
Publication Date: 2020.02.04 INFINEON TECHNOLOGIES AG
  • US10553675B2 patent drawing
  • US10553675B2 patent drawing
  • US10553675B2 patent drawing

AI summary

In accordance with an embodiment of an integrated circuit, a cavity is buried in a semiconductor body below a first surface of the semiconductor body. An active area portion of the semiconductor body is arranged between the first surface and the cavity. The integrated circuit further includes a trench isolation structure configured to provide a lateral electric isolation of the active area portion.