Buried Ceramic Capacitor for Multi-Core Power Supply
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Solution Overview
Problem
The challenge is to create a circuit board that can effectively support multi-core microprocessor structures by providing independent power supply systems to processor cores and matching thermal expansion coefficients, while simplifying manufacturing and reducing costs.
Innovation Solution
A circuit board design featuring a ceramic capacitor with alternately stacked inner electrode layers and ceramic dielectric layers, buried in a board core, and a buildup layer with interlayer insulating and conductor layers, allowing for independent electrical connections to multiple processor cores and supporting various semiconductor integrated circuit devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional IC chip mounting circuit board is used, then the manufacturing process is simple, but it cannot provide independent power supply systems to multiple processor cores
Solution Approach 1:
The circuit board is segmented into multiple independent power supply regions, each with its own power supply terminal and associated capacitor. This allows different processor cores to receive power from separate systems, enabling independent power management while maintaining a modular structure that doesn't overly complicate manufacturing.
Solution Approach 2:
The patent transitions from a two-dimensional surface mounting approach to a three-dimensional structure by embedding capacitors within the board core and utilizing multiple layers. This vertical arrangement allows multiple power supply systems to coexist in a compact space without proportionally increasing the board's footprint or manufacturing complexity.
2Reliability
If thermal expansion coefficients of the multi-core micro processor and circuit board are not matched, then manufacturing is easier, but thermal stress causes cracks or connection failures
Solution Approach 1:
The patent carefully selects materials with specific thermal expansion coefficients that match between the multi-core micro processor and circuit board. By controlling and matching this physical parameter, the design reduces thermal stress and prevents cracking while maintaining manufacturability through the use of standard ceramic and metal materials.
Solution Approach 2:
The circuit board employs composite materials, particularly ceramic substrates, which offer favorable thermal expansion properties that can be matched to the micro processor. These composite structures provide both the necessary thermal compatibility and mechanical strength to withstand thermal cycling without causing connection failures.
3Adaptability or versatility
If multiple capacitors are mounted on the circuit board to provide independent power supply, then power supply independence is achieved, but the board area and manufacturing complexity increase
Solution Approach 1:
The patent embeds capacitors within the board core structure, nesting them between internal layers rather than mounting them on the surface. This allows multiple capacitors for multiple power supply systems to be accommodated within the board's thickness, significantly reducing the required board area while maintaining the ability to provide independent power to multiple processor cores.
Solution Approach 2:
The design moves capacitor placement from the two-dimensional surface plane to the three-dimensional internal volume of the board. By utilizing the vertical dimension and embedding capacitors within the core, the system accommodates multiple power supply components without proportionally increasing the board's footprint.
Data Source
AI summary
A circuit board (10, 10″, 10′″) comprising: a board core (11) having a main core surface (12) and a rear core surface (13); a ceramic capacitor (101, 101′, 101″, 101′″, 101″″, 101″″′, 101″″″) having a main capacitor surface (102) and a rear capacitor surface (103), having a structure in which a first inner electrode layer (141) and a second inner electrode layer (142) are alternately stacked with a ceramic dielectric layer (105) interposed therebetween, and having a plurality of capacitor function units (107, 108) being electrically independent from each other, the ceramic capacitor (101, 101′, 101″, 101′″, 101″″, 101″″′, 101″″″) being buried in the board core (11) in a state where the main core surface (12) and the main capacitor surface (102) are directed in a same direction; and a buildup layer (31) having a structure in which an interlayer insulating layer (33, 35) and a conductor layer (42) are alternately stacked on the main core surface (12) and the main capacitor surface (102) and having a semiconductor integrated circuit device mounting region (23, 51, 52) for mounting a semiconductor integrated circuit device (21, 53, 54) having a plurality of processor cores (24, 25) on a surface (39) of the buildup layer (31), wherein the plurality of capacitor function units (107, 108) are capable of being electrically connected to the plurality of processor cores (24, 25), respectively.