Buried-Channel FET Shielding Layer for Low Noise
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Solution Overview
Problem
High-k dielectrics in modern CMOS technologies lead to increased noise due to a higher density of interface traps, which is problematic for applications requiring low noise, such as radio frequency signals.
Innovation Solution
The formation of buried-channel field-effect transistors (FETs) with a doped shielding layer of opposite doping type, which displaces the conducting channel away from the gate-interface region, reducing noise by preventing charge trapping at the high-k gate-dielectric interface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If high-k dielectrics are used in CMOS technologies, then transistor size can be reduced, but noise increases due to higher density of interface traps
Solution Approach 1:
The channel region is segmented into two parts: a surface channel region that remains close to the gate-dielectric interface, and a buried channel region that is displaced away from the interface by the doped shielding layer. This segmentation allows different parts of the channel to serve different functions, with the buried channel portion providing low-noise operation while the overall transistor maintains small dimensions through the high-k dielectric
Solution Approach 2:
A doped shielding layer is introduced as an intermediary element between the gate dielectric and the channel region. This shielding layer, doped with opposite polarity to the channel, creates an electric field that repels charge carriers away from the high-k dielectric interface, thereby reducing the harmful effect of interface traps on noise while preserving the benefits of high-k dielectric for transistor scaling
2Object-generated harmful factors
If a doped shielding layer is formed to displace the channel away from the gate interface, then noise performance improves, but device structure becomes more complex
Solution Approach 1:
The formation of the doped shielding layer is merged with the existing source and drain doping regions. The same doping process that creates the source and drain regions also forms the shielding layer in the channel region, eliminating the need for separate shielding layer formation steps and simplifying the overall fabrication process
Solution Approach 2:
The doped shielding layer serves multiple functions: it displaces the channel from the gate-dielectric interface to reduce noise, it acts as a barrier to charge trapping, and it can be integrated with the source and drain regions to provide both channel formation and noise reduction in a single structural element
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves noise performance for high-frequency applications by reducing noise levels and allowing for efficient integration of both surface-channel and buried-channel FETs on a single chip, achieving low noise and cost savings through a single fabrication process.
Implementation Method 1
forming a doped shielding layer on the substrate in a channel region having a second doping type opposite the first type to displace a conducting channel away from a gate-interface region
Data Source
AI summary
A buried-channel field-effect transistor includes a semiconductor layer formed on a substrate. The semiconductor layer includes doped source and drain regions and an undoped channel region. the transistor further includes a gate dielectric formed over the channel region and partially overlapping the source and drain regions; a gate formed over the gate dielectric; and a doped shielding layer between the gate dielectric and the semiconductor layer.