Buried Charge Semiconductor Range-Finding Element for Low Noise

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Solution Overview

Problem

Current time-of-flight (TOF) type range-finding sensors face challenges with high dark current, reset noise, and manufacturing costs, limiting their resolution and performance, especially in low light conditions.

Innovation Solution

A semiconductor range-finding element with island-shaped buried charge-generation and transfer regions, along with insulating films and gate electrodes, is designed to reduce dark current and noise, enabling high-resolution distance measurement by accumulating and transferring signal charges efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the number of pixels is increased in TOF type range-finding sensor, then the resolution is improved, but it becomes difficult to drive the pixels and manufacturing cost increases

Engineering Contradiction:
ImproveresolutionVSAvoidpixel driving complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent combines multiple functions (photoelectric conversion, charge transfer, charge accumulation, and readout) into a single integrated pixel structure using shared components. Multiple pixels share common transfer gates and readout circuits, reducing the overall complexity of driving high-resolution sensors while maintaining high pixel counts

Inventive Principle:
Principle #5Merging (Combining)

2Ease of manufacture

If the semiconductor layer under the field oxide film is used as active layer, then the manufacturing cost is reduced, but the dark current becomes large

Engineering Contradiction:
Improvemanufacturing costVSAvoiddark current
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The patent extracts the charge transfer and accumulation functions from the bulk semiconductor layer and implements them through surface-level buried charge regions. This separation allows the use of simple CMOS technology for cost-effective manufacturing while the engineered buried charge regions provide controlled charge transfer paths that minimize dark current generation

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces insulating films as intermediary layers between the semiconductor active layer and gate electrodes. These insulating films act as mediators that enable electrical control of charge transfer while preventing direct charge generation from gate effects, thereby reducing dark current in cost-effective CMOS-based structures

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If charges are accumulated in the floating diffusion layer, then the structure is simple, but reset noise cannot be removed and random noise level is high

Engineering Contradiction:
Improvestructure simplicityVSAvoidreset noise
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The patent segments the charge accumulation function from the readout function by introducing separate buried charge transfer regions and buried charge readout regions. This segmentation allows charges to be transferred to dedicated accumulation regions before readout, enabling reset noise removal through correlated double sampling while maintaining a relatively simple overall structure

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from two-dimensional surface charge accumulation in floating diffusion layers to three-dimensional buried charge regions beneath the surface. This dimensional change enables better spatial separation of charge transfer, accumulation, and readout functions, facilitating noise reduction while maintaining structural efficiency

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution achieves low noise performance, high distance resolution, and reduced manufacturing costs, allowing for a higher pixel count and improved space resolution in solid-state imaging devices.

Implementation Method 1

configured to electrostatically control potentials of transfer channels formed between the buried charge-generation region and the first buried charge-transfer region and between the buried charge-generation region and the second buried charge-transfer region

Methodology Applied
Scientific EffectElectrostatic control: Electrostatics

Implementation Method 2

the optical signal is converted into the signal charges

Methodology Applied
Scientific EffectPhotoelectric conversion: Photoelectric Effect

Data Source

PatentUS7843029B2Semiconductor range-finding element and solid-state imaging device
Publication Date: 2010.11.30 SHARP KK
  • US7843029B2 patent drawing
  • US7843029B2 patent drawing
  • US7843029B2 patent drawing

AI summary

A semiconductor range-finding element and a solid-state imaging device, which can provide a smaller dark current and a removal of reset noise. With n-type buried charge-generation region, buried charge-transfer regions, buried charge read-out regions buried in a surface of p-type semiconductor layer, an insulating film covering these regions, transfer gate electrodes arranged on the insulating film for transferring the signal charges to the buried charge-transfer regions, read-out gate electrodes arranged on the insulating film for transferring the signal charges to the buried charge read-out regions, after receiving a light pulse by the buried charge-generation region, in the semiconductor layer just under the buried charge-generation region, an optical signal is converted into signal charges, and a distance from a target sample is determined by a distribution ratio of the signal charges accumulated in the buried charge-transfer regions.