Buried Conductive Line Height Variation for DRAM Contact Windows
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The formation of buried conductive lines in substrates is hindered by high aspect ratios of contact windows in dielectric layers and recessed epitaxy layers due to the need to etch through filled dielectric layers, which complicates the creation of contact holes and increases parasitic capacitance in densely integrated DRAMs.
Innovation Solution
A method involving a substrate with trenches and a conductive layer, where a mask layer is used to etch back the conductive layer in the contact area, resulting in a buried conductive line with a higher top in the contact area, reducing the aspect ratio of contact windows and eliminating the need to etch through a cap layer, thereby reducing epitaxy layer recess and simplifying contact window formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the conductive layer is entirely buried deeply in the trench, then the channel length of transistors is increased and the distance between conductive lines is increased, but the aspect ratio of the contact window becomes large and it becomes difficult to form
Solution Approach 1:
The patent applies local quality by creating different heights of the conductive layer at different locations. Specifically, the conductive layer is formed at a first height in the non-contact area and at a second height (higher than the first) in the contact area. This local variation allows the contact window to have a smaller aspect ratio while maintaining the deep burial benefit in non-contact areas, thus resolving the contradiction between increased channel length and contact window formation difficulty.
2Ease of manufacture
If the contact hole needs to etch through the dielectric layer filled in the trench over the buried conductive line, then the contact window can be formed, but the epitaxy layer in the periphery is recessed
Solution Approach 1:
The patent applies preliminary action by pre-forming the conductive layer at different heights before the contact window etching process. The conductive layer is deliberately formed higher in the contact area beforehand, which means that when the contact window is etched through the dielectric layer, the etching depth required is reduced, thereby minimizing the recess of the epitaxy layer in the periphery while still allowing contact window formation.
3Productivity
If the integration degree of DRAM increases, then the device size is reduced, but the distance between word lines and bit lines is reduced inducing parasitic capacitance
Solution Approach 1:
The patent applies dimensionality change by transitioning from a planar arrangement of conductive lines to a three-dimensional buried conductive line structure. By burying the word lines deeper in the substrate and creating vertical depth variation in the conductive layer height, the patent increases the vertical distance between word lines and bit lines, thereby reducing parasitic capacitance while maintaining high integration density through efficient space utilization in the vertical dimension.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the aspect ratio of contact windows and minimizes epitaxy layer recess, facilitating easier contact window formation and reducing parasitic capacitance, thus enhancing the integration density of DRAMs without the need for complex etching through cap layers.
Implementation Method 1
The conductive layer is etched back using the mask layer as a mask
Data Source
AI summary
A method for forming a buried conductive line is described. A substrate having a trench therein and a contact area thereon is provided, wherein the trench has an end portion in the contact area and a conductive layer is filled in the trench. A mask layer is formed covering the conductive layer in the contact area. The conductive layer is etched back using the mask layer as a mask.