Buried Digit Line Junction Depth Control via Mask Layer
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Solution Overview
Problem
Conventional semiconductor processes for buried digit lines in memory arrays face challenges with junction out-diffusion and increased digit-line capacitance due to the long drive-in step required for forming digit-side junctions, which complicates digit-line separation and increases capacitance.
Innovation Solution
A semiconductor process involving the formation of first and second trenches with a liner layer and mask layer, allowing for isotropic doping only on the sidewall of the second trench, eliminating the need for a drive-in step and controlling junction depth, thereby minimizing junction out-diffusion and reducing digit-line capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a long drive-in step is used to form digit-side junctions, then the junction depth increases to overlap with word lines, but the junction out-diffusion increases causing difficulty in digitline-to-digitline separation and higher digitline capacitance
Solution Approach 1:
The patent applies preliminary action by forming the mask layer at the bottom of the second trench before performing the doping process. This pre-positioned mask layer prevents dopant diffusion into the trench bottom region during the doping step, thereby controlling junction depth and preventing out-diffusion without requiring a long drive-in step. The mask layer is strategically placed in advance to define the exact junction boundary.
Solution Approach 2:
The mask layer serves as an intermediary element between the doping process and the substrate. It mediates the doping action by allowing dopants to reach the sidewall regions for junction formation while blocking diffusion into the trench bottom. This intermediary structure enables precise spatial control of the doping process, achieving the desired junction depth without excessive diffusion.
2Reliability
If doped regions are formed near the bottom of trenches, then digit-side junctions can be created, but the long drive-in step causes increased junction depth and higher digitline capacitance
Solution Approach 1:
The patent extracts the harmful diffusion component by selectively removing or blocking the diffusion path into the trench bottom using the mask layer. The doping process is extracted to only affect the sidewall regions where digit-side junctions are needed, while the trench bottom region is excluded from doping. This selective extraction of the doping action reduces unnecessary junction depth and associated capacitance.
Solution Approach 2:
The patent applies local quality by creating different doping conditions in different spatial regions. The sidewall regions receive full doping treatment to form functional digit-side junctions, while the trench bottom region is protected by the mask layer and remains undoped or lightly doped. This localized doping approach achieves reliable junction formation where needed while minimizing capacitance in other regions.
3Manufacturing precision
If deep trenches are formed in the substrate, then digit-side junctions can be created at appropriate depths, but the long drive-in step required increases junction depth and causes digitline separation difficulties
Solution Approach 1:
The mask layer is preliminarily positioned at the trench bottom before doping, establishing a clear boundary that prevents dopant diffusion into the trench bottom region. This preliminary action simplifies the subsequent doping process and eliminates the need for long drive-in steps, thereby maintaining sharp digitline separation while achieving the required junction depth through controlled sidewall doping only.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This process enhances digit-line separation and reduces digit-line capacitance by forming shorter digit-side junctions without the need for a drive-in step, improving the overall performance of the memory array.
Implementation Method 1
An isotropic doping process is performed using the liner layer and the mask layer as a mask to form a digit-side junction only in the substrate at the sidewall of the second trench
Data Source
AI summary
A semiconductor process for a memory array with buried digit lines is described. A first trench is formed in a semiconductor substrate. A liner layer is formed on the sidewall of the first trench. A second trench is formed in the substrate under the first trench. A mask layer is formed at the bottom of the second trench. An isotropic doping process is performed using the liner layer and the mask layer as a mask to form a digit-side junction only in the substrate at the sidewall of the second trench.