Buried Doped Source-Line Coupling for Scaled Memory Cells
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Solution Overview
Problem
Conventional techniques for forming a source line contact to memory cells in integrated circuits are incompatible with the ever-decreasing size of memory structures, particularly in flash memory cells with multiple gate conductors, making it difficult to effectively couple the source line contact to the gate structure.
Innovation Solution
A buried doped region within the substrate is used, extending perpendicular to the gate structure, to couple the source line contact to the gate structure through its lower surface, allowing for efficient electrical conductivity and alignment with bit line contacts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional techniques are used to form a source line contact to memory cells, then the manufacturing process is simpler, but the technique becomes incompatible with ever-decreasing size of memory structures
Solution Approach 1:
The source line contact is formed outside the memory cell footprint by extending the buried doped region laterally, moving the contact formation to a different spatial dimension. This allows the source line contact to be accessed from the side rather than requiring direct contact through the cell structure, resolving the incompatibility between small cell size and conventional contact formation techniques
Solution Approach 2:
A buried doped region acts as an intermediary element that couples the source line contact to the gate structure. This intermediate structure extends from the gate structure through the substrate to a laterally accessible portion, enabling electrical connection without requiring direct contact through the memory cell itself
2Productivity
If the source line contact is formed outside the memory cell, then the manufacturing process is simplified and scalability is improved, but additional substrate area is required for the buried doped region
Solution Approach 1:
The buried doped region is localized to specific areas where it is needed for coupling, rather than extending uniformly across the entire substrate. The doped region is concentrated in the space between adjacent memory cells, utilizing otherwise unused substrate area and minimizing the overall area impact
3Reliability
If the buried doped region extends perpendicular to the gate structure, then electrical conductivity is improved, but the alignment precision requirements increase
Solution Approach 1:
The buried doped region is formed in a multi-step process where it is first created beneath the gate structure, then extended laterally to the substrate portion. This segmentation of the doping process allows for better control and alignment at each stage, reducing the overall alignment precision requirements compared to forming the entire structure in a single step
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables the formation of source line contacts outside the memory cell, simplifying the manufacturing process, reducing resistance, and allowing for the integration of source line and bit line contacts in a single row, thereby improving the operational efficiency and scalability of memory cells.
Implementation Method 1
the buried doped region couples the source line contact to the gate structure of the memory cell through a lower surface of the gate structure
Data Source
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AI summary
The disclosure provides a structure (100) with a buried doped region (112) for coupling a source line contact (114) to the gate structure (110) of a memory cell (104). A structure according to the disclosure includes a memory cell having a gate structure extending in a first lateral direction (X) over a substrate (102). A buried doped region is within the substrate and extends in a second lateral direction (Y) from below the gate structure to a portion of the substrate laterally distal to the gate structure. A source line contact is on the portion of the substrate laterally distal to the gate structure. The buried doped region couples the source line contact to the gate structure of the memory cell through a lower surface of the gate structure.