Buried Gate Structure Protection via Blocking Layer Pattern
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Solution Overview
Problem
The manufacturing of semiconductor devices with buried gate structures faces challenges such as oxide diffusion and etching damage during subsequent processes, which can adversely affect the gate structure's integrity and electrical characteristics.
Innovation Solution
A method involving the formation of a mask on a substrate, creating a recess, and forming a blocking layer pattern using silicon oxide and silicon nitride to protect the gate structure from damage during subsequent processes like thermal oxidation and etching, ensuring the buried gate structure remains intact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If subsequent processes (cleaning, annealing, oxidation) are performed after forming the buried gate structure, then the gate structure can be formed in peripheral circuit region, but the buried gate structure is adversely affected by oxide diffusion and etching damage
Solution Approach 1:
A blocking layer pattern is introduced as an intermediary protective element between the etching/cleaning processes and the buried gate structure. This blocking layer selectively protects the gate structure from oxide diffusion and etching damage while allowing the subsequent processes to proceed in peripheral circuit regions.
Solution Approach 2:
The blocking layer pattern is formed in advance before the cleaning, annealing, and oxidation processes. This preliminary protective measure ensures that when these subsequent processes are performed, the buried gate structure is already shielded from potential damage.
2Ease of manufacture
If the mask is completely removed after forming the recess, then the substrate is accessible for subsequent processes, but the gate structure lacks protection from oxide diffusion and etching damage
Solution Approach 1:
The blocking layer pattern serves as a mediator that remains on the substrate after mask removal. It provides continuous protection against oxide diffusion and etching damage while not interfering with subsequent manufacturing processes.
Solution Approach 2:
The blocking layer pattern is selectively applied only in regions where the buried gate structure is present, providing localized protection where needed while leaving other areas of the substrate accessible for subsequent processes.
3Reliability
If a blocking layer pattern is formed to protect the gate structure, then the gate structure is protected from damage, but the device structure becomes more complex
Solution Approach 1:
The blocking layer is segmented into a patterned structure that selectively covers only the regions containing the buried gate structure. This segmentation provides necessary protection while minimizing the overall amount of additional material and structural complexity.
Solution Approach 2:
The blocking layer pattern serves multiple functions: it protects the gate structure from oxide diffusion, shields against etching damage, and maintains compatibility with subsequent cleaning and annealing processes. This multi-functionality reduces the need for additional separate protective measures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively protects the buried gate structure from damage, maintaining excellent electrical characteristics and ensuring the semiconductor device's performance and reliability.
Implementation Method 1
An upper portion of the substrate in the first region is partially removed using the mask as an etching mask to form a recess
Implementation Method 2
A wet etching process may be performed on the mask
Implementation Method 3
a blocking layer pattern protecting the buried gate structure may be formed. By forming the blocking layer pattern, the buried gate structure may be more protected from being damaged during subsequent processes, such as a thermal oxidation process
Implementation Method 4
The portion of the blocking layer in the second may be removed region by a planarizing process
Data Source
AI summary
In a method of manufacturing a semiconductor device, a mask is formed on a substrate. The substrate is divided into a first region and a second region. An upper portion of the substrate in the first region is partially removed using the mask as an etching mask to form a recess. A first gate structure is formed in the recess. A portion of the mask in the first region is removed. A blocking layer pattern is formed on the substrate in the first region over the first gate structure.