Light-Receiving Element Buried Gate Layout for Fast Charge Transfer
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Solution Overview
Problem
Time-of-flight (ToF) sensors require high-speed transfer of electric charges generated by light reception to improve signal/noise ratio for accurate distance measurement, which is challenging due to the need for repeated light reception at short intervals.
Innovation Solution
A light receiving element with a semiconductor substrate, photoelectric conversion unit, and distribution gates with buried gate portions to efficiently transfer electric charges to accumulation units, enhancing transfer speed and accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If light reception is repeated multiple times at short intervals to increase signal amount, then signal/noise ratio is improved, but electric charge transfer speed must be increased
Solution Approach 1:
The distribution gate is divided into multiple independent distribution transistor units, each capable of transferring electric charges independently. This segmentation allows parallel charge transfer operations, increasing overall transfer speed while maintaining the repeated light reception cycle needed for high S/N ratio
Solution Approach 2:
Buried gate portions are extended in the depth direction (third dimension) within the semiconductor substrate. This vertical extension increases the effective gate area and control capability without occupying additional lateral space, enabling faster electric field modulation for rapid charge transfer
2Productivity
If distribution gates are added to distribute electric charges to multiple accumulation units, then charge transfer efficiency is improved, but device complexity increases
Solution Approach 1:
Each distribution transistor unit is designed with multi-functionality, serving both as a transfer gate and as a control element for multiple accumulation units. The buried gate portions are positioned to exert control over charge flow paths to different accumulation units, reducing the need for separate control structures
Solution Approach 2:
Multiple distribution transistor units share common structural elements, including the semiconductor substrate region and portions of the buried gate structure. This merging approach reduces overall device complexity by eliminating redundant components while maintaining the capability to distribute charges to multiple accumulation units efficiently
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables high-speed and accurate transfer of electric charges, improving the signal/noise ratio and enabling precise distance measurement in ToF sensors.
Implementation Method 1
a photoelectric conversion unit which is provided in the semiconductor substrate and converts light into electric charges
Data Source
Figure 1
Figure 2A
Figure 2B
AI summary
Provided is a light receiving element including: a semiconductor substrate; a photoelectric conversion unit (PD) which is provided in the semiconductor substrate (200) and converts light into electric charges; a first electric charge accumulation unit (MEM) which is provided in the semiconductor substrate and to which the electric charges are transferred from the photoelectric conversion unit; a first distribution gate (150a) which is provided on a front surface of the semiconductor substrate and distributes the electric charges from the photoelectric conversion unit to the first electric charge accumulation unit; a second electric charge accumulation unit (MEM) which is provided in the semiconductor substrate and to which the electric charges are transferred from the photoelectric conversion unit; and a second distribution gate (150b) which is provided on the front surface of the semiconductor substrate and distributes the electric charges from the photoelectric conversion unit to the second electric charge accumulation unit, in which the first and second distribution gates each have a pair of buried gate portions (170a and 170b) buried in the semiconductor substrate.