Buried Gate Semiconductor Device with Dipole Inducing Layer
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Solution Overview
Problem
Current semiconductor devices with buried gate structures face challenges in controlling threshold voltage and managing gate-induced drain leakage (GIDL), which affect performance and refresh characteristics, especially in memory cells.
Innovation Solution
A semiconductor device with a buried gate structure featuring a trench lined with a gate dielectric layer, a dipole inducing layer, and a gate electrode with specific work function layers and materials, including a high work function portion and a low work function portion, to modulate the threshold voltage and reduce GIDL.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal gate electrode is applied for high performance transistor operation, then transistor performance is improved, but control of threshold voltage becomes difficult and gate-induced drain leakage (GIDL) increases
Solution Approach 1:
The gate electrode is divided into two distinct portions with different work functions: a first portion with high work function (4.5-5.5 eV) that overlaps with the channel region to control threshold voltage, and a second portion with low work function (3.5-4.5 eV) that overlaps with doping regions to reduce GIDL. This local differentiation of material properties resolves the contradiction by optimizing each region's function independently.
Solution Approach 2:
The gate electrode is segmented into multiple portions with different work function characteristics. The first portion (high work function) and second portion (low work function) are spatially separated and positioned to overlap with different underlying regions (channel vs. doping regions), allowing independent optimization of threshold voltage control and GIDL suppression.
2Reliability
If a dipole inducing layer with high dielectric constant is used to shift threshold voltage, then threshold voltage control is improved, but device structure complexity increases
Solution Approach 1:
A dipole inducing layer composed of high dielectric constant material (k=10-50, such as Al2O3, TiO2, HfO2, ZrO2, or MgO) is introduced between the gate electrode and channel region. This layer creates an internal electric field that shifts the threshold voltage, providing precise control without requiring complex external biasing circuits or additional control elements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively shifts the threshold voltage, reduces GIDL, and improves refresh characteristics in memory cells, enhancing the overall performance and reliability of semiconductor devices.
Implementation Method 1
a dipole inducing layer covering a lowermost portion of the trench... The dipole inducing layer may include a dielectric material that has a dielectric constant higher than the gate dielectric layer
Implementation Method 2
The first portion of the gate electrode may have a high work function higher than the second portion... The work function layer may include: a first portion contacting the dipole inducing layer; and a second portion neighboring the sidewalls of the trench
Implementation Method 3
a barrier layer may be formed over the work function layer and the low-resistivity layer
Data Source
AI summary
A semiconductor device includes at least one trench extending into a semiconductor substrate and lined with a gate dielectric layer; a dipole inducing layer covering a lowermost portion of the lined trench; a gate electrode covering the dipole inducing layer and filled in the lined trench; and doping regions, in the semiconductor substrate, separated from each other by the lined trench and separated from the dipole inducing layer.