Buried Gate Semiconductor Device with Dummy Active Region
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Solution Overview
Problem
The increased integration of semiconductor devices with buried gates leads to misalignment issues in contact formation between sub word line drivers and buried gates, causing current leakage due to connections with the substrate.
Innovation Solution
A semiconductor device design incorporating a dummy active region with P-type and N-type impurity regions forming a PN junction diode, which prevents current leakage by acting as a reverse-biased diode when misalignment occurs, and a method of manufacturing involving the formation of a device isolation layer, trench etching, gate formation, and impurity implantation to create this diode structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a buried gate is applied to reduce parasitic capacitance, then sensing margins are improved, but misalignment between contact and buried gate becomes more likely
Solution Approach 1:
A dummy active region is introduced as an intermediary structure between the contact and the substrate. This dummy active region includes a first impurity region and a second impurity region that form a PN junction diode, acting as a mediator to prevent current leakage when misalignment occurs.
Solution Approach 2:
The dummy active region with PN junction diode is formed in advance before contact formation. This pre-formed structure serves as a protective cushion that prevents current leakage to the substrate if misalignment occurs during subsequent contact formation processes.
2Ease of manufacture
If contact misalignment occurs, then current leakage to substrate increases, but device functionality is compromised
Solution Approach 1:
The potential harmful effect of misalignment is converted into a beneficial protective mechanism. When misalignment occurs and the contact connects to the dummy active region instead of the buried gate, the PN junction diode formed by the first and second impurity regions becomes reverse-biased, blocking current leakage to the substrate and turning the misalignment error into a protective feature.
3Object-affected harmful factors
If distance between metal line and buried gate is increased, then parasitic capacitance is reduced, but misalignment probability increases
Solution Approach 1:
The dummy active region serves as an intermediary protective layer between the contact and the substrate. This mediator structure allows for increased distance between the metal line and buried gate (reducing parasitic capacitance) while providing a safety mechanism that prevents current leakage if misalignment occurs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively prevents current leakage to the substrate even when misalignment occurs during contact formation, ensuring reliable operation of semiconductor devices with buried gates.
Implementation Method 1
The dummy active region may include a P-type impurity region and an N-type impurity region in contact with the P-type impurity region
Data Source
AI summary
A dummy active region is formed in a region in which a gate contact for supplying operation power to the buried gate is formed, and a PN junction diode connected to the gate contact in a reverse bias direction is formed in the dummy active region. Current leakage, in which current flows out toward a substrate, is prevented even when misalignment of the gate contact occurs.