Buried Gate Fin Transistor for Drive Current
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor devices integrate more densely, reducing design rules leads to unstable transistor operations and deteriorated drive current characteristics, particularly due to limitations in improving drive current and channel resistance in conventional fin transistors, and challenges in constructing junctionless transistors.
Innovation Solution
The semiconductor device incorporates a fin-type channel with a novel structure, including a first and second gate trench, a buried gate, and source and drain plugs formed by etching recesses and depositing conductive material, allowing for increased drive current path and enabling junctionless transistor operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the active region size is reduced to increase integration degree, then device density is improved, but drive current characteristics are deteriorated
Solution Approach 1:
The patent transitions from a planar channel structure to a three-dimensional fin channel structure by forming vertical fins in the semiconductor substrate. This dimensional change allows the channel to extend in the vertical direction while maintaining a reduced lateral footprint, thereby improving integration density while preserving drive current characteristics through increased channel volume and surface area for carrier transport.
Solution Approach 2:
The patent implements a nested structure where the gate electrode is embedded within a gate trench that is itself surrounded by the fin channel structure. The fin channel is formed by etching recesses into the substrate, creating a nested arrangement where the active channel region is contained within the gate-defined trench structure, maximizing space utilization and electrical control.
2Reliability
If fin height is increased to extend current path, then drive current is improved, but manufacturing complexity increases
Solution Approach 1:
The patent segments the gate structure into multiple discrete gate electrodes, each occupying a separate gate trench. This segmentation allows independent optimization of each fin and gate pair, enabling precise control over current paths while simplifying the manufacturing process by breaking down the complex three-dimensional structure into manageable, repeating units that can be formed using standard semiconductor fabrication techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances drive current characteristics by extending the current path in proportion to the fin height, improving transistor performance and enabling efficient operation of junctionless transistors.
Implementation Method 1
forming a source plug and a drain plug by depositing a conductive material into the source recess and the drain recess
Implementation Method 2
forming a gate trench by etching the active region and the device isolation film
Data Source
AI summary
A semiconductor device includes an active region with a first gate trench formed when a gate region is etched to a first depth, a device isolation film defining the active region and including a second gate-trench formed when a gate region is etched to a second depth, a gate buried below the first gate trench and the second gate trench, and a source plug and a drain plug formed when a conductive material is deposited in a source region and a drain region of the active region.