Buried Gate Electrode Structure for Lower GIDL in Trenches
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Solution Overview
Problem
The increasing demand for high integration and high-speed semiconductor devices poses challenges in fabricating semiconductor devices with improved electrical properties, particularly in maintaining process margins and reducing Gate-Induced Drain Leakage (GIDL) during the exposure process.
Innovation Solution
A semiconductor device with a buried gate structure is fabricated, featuring a trench with a gate dielectric layer, a first gate electrode, a diffusion barrier layer, a second gate electrode doped with a low work function adjusting element, and a capping layer, which includes a buffer layer and a capping layer to fill the trench, preventing diffusion of the low work function adjusting element and reducing GIDL.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal nitride gate electrode is used, then electrical properties are improved, but work function is too high causing increased GIDL
Solution Approach 1:
The patent applies local quality by creating a composite gate electrode structure where different materials with different work functions are used in specific regions. The first gate electrode uses metal nitride (TiN, TaN, WN) for low resistance and good electrical properties, while the second gate electrode uses a different metal nitride or doped metal nitride with lower work function to reduce GIDL. This spatial differentiation of material properties allows simultaneous optimization of electrical characteristics and leakage reduction.
Solution Approach 2:
The patent employs composite materials by combining multiple metal nitride layers with different work functions in a stacked gate electrode structure. The first gate electrode layer (e.g., TiN) provides excellent electrical conductivity, while the second gate electrode layer (e.g., TaN, WN, or doped TiN) provides lower work function to minimize GIDL. This composite structure integrates the advantages of different materials to achieve both low resistance and low leakage performance.
2Productivity
If high integration is pursued, then device density increases, but process margin decreases making fabrication difficult
Solution Approach 1:
The patent applies segmentation by dividing the gate electrode into multiple distinct layers (first gate electrode and second gate electrode) with different material compositions and functions. This segmentation allows independent optimization of each layer's properties - the first layer for electrical conductivity and the second layer for work function control - thereby achieving high integration benefits while maintaining manufacturing process margins through modular fabrication.
3Reliability
If gate electrode volume is increased, then electrical properties improve, but diffusion of low work function elements increases
Solution Approach 1:
The patent introduces a buffer layer as an intermediary between the first gate electrode (containing low work function adjusting elements) and the second gate electrode. This buffer layer acts as a diffusion barrier that prevents the low work function elements from the first gate electrode from diffusing into the second gate electrode, thereby maintaining compositional stability and controlling the work function of the second gate electrode while still allowing the first gate electrode to provide excellent electrical properties.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances electrical properties by reducing specific resistance and threshold voltage adjustments, while minimizing GIDL and maintaining high integration and speed requirements.
Implementation Method 1
doping the second gate electrode with a low work function adjusting element
Implementation Method 2
forming a buffer layer covering a top surface of the second gate electrode... preventing diffusion of low work function adjusting elements
Data Source
AI summary
A semiconductor device includes: a trench formed in a substrate; a gate dielectric layer covering sidewalls and a bottom surface of the trench; a first gate electrode gap-filling a bottom portion of the trench over the gate dielectric layer; a second gate electrode including a metal nitride which is the same as the first gate electrode over the first gate electrode and doped with a low work function adjusting element; a buffer layer covering a top surface of the second gate electrode and the gate dielectric layer exposed over second gate electrode; and a capping layer gap-filling the other portion of the trench over the buffer layer.