Buried Gate Electrode Structure for Low Resistance and Better GIDL
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Solution Overview
Problem
As semiconductor memory devices become highly integrated, the decreasing line widths of buried word lines lead to increased resistance, which complicates the improvement of gate-induced drain leakage (GIDL) characteristics when polysilicon is used for double gate electrodes.
Innovation Solution
A semiconductor device with a buried gate structure that includes a gate trench, a gate dielectric layer, first and second gate electrodes, a dipole inducing portion with both dipole and non-dipole bonds, and a capping layer, which are fabricated using specific processes to improve electrical characteristics and reduce resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If polysilicon is used for double gate electrode to improve GIDL characteristics, then GIDL characteristics are improved, but resistance increases due to decrease in line widths of word lines
Solution Approach 1:
The patent uses a composite gate electrode structure combining polysilicon and metal materials. The gate electrode includes a polysilicon layer for GIDL improvement and a metal layer (such as tungsten or copper) for low resistance. This composite structure allows simultaneous achievement of good GIDL characteristics and low resistance by leveraging the advantages of both materials.
Solution Approach 2:
The gate electrode is divided into multiple layers with different materials and functions. The polysilicon layer serves the primary gate function with good interface characteristics, while the metal layer provides low resistance pathways. This segmentation allows each layer to optimize its specific function without compromising the other.
2Productivity
If line widths of buried word lines are decreased for high integration, then integration is improved, but resistance increases
Solution Approach 1:
By using composite gate electrodes with metal layers, the patent achieves low resistance even with decreased line widths. The metal material provides high conductivity that compensates for the reduced cross-sectional area, enabling high integration without suffering from excessive resistance.
Solution Approach 2:
The patent changes the material parameters of the gate electrode by introducing metal materials with higher conductivity. This parameter change allows the gate electrode to maintain low resistance despite the geometric parameter change (decreased line width) required for high integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces the resistance of word lines while enhancing GIDL characteristics by using a dipole inducing portion with both dipole and non-dipole bonds, preventing unnecessary diffusion of unreacted chemical species and ensuring reliable operation by preventing shorts between contacts.
Implementation Method 1
a dipole inducing portion positioned between the second gate electrode and the gate dielectric layer and including a dipole bond and a non-dipole bond
Implementation Method 2
performing an impurity ion implantation process for a non-dipole bond onto the dipole inducing portion
Data Source
AI summary
A semiconductor device includes a gate trench formed in a substrate, a gate dielectric layer formed along profile of sidewalls and a bottom surface of the gate trench, first and second gate electrodes that are stacked over the gate dielectric layer to gap-fill a portion of the gate trench, a dipole inducing portion positioned between the second gate electrode and the gate dielectric layer and including a dipole bond and a non-dipole bond, and a capping layer suitable for gap-filling a remaining portion of the gate trench over the dipole inducing portion and the second gate electrode.