Buried Gate Structure With Vertical Gates for Lower GIDL
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Solution Overview
Problem
Current semiconductor devices with buried gate structures face challenges in controlling gate-induced drain leakage (GIDL), which affects their performance, particularly in high-performance transistors where threshold voltage control is crucial.
Innovation Solution
A semiconductor device and method for fabricating a buried gate structure that includes a gate dielectric layer, a lower gate, a vertical gate formed on the edges of the lower gate, and an upper gate, with a capping layer and spacer, where the vertical gate is self-aligned using a spacer etch process, reducing sheet resistance and improving GIDL by engineering the work function of the gate electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a metal gate electrode is applied for high performance of a transistor, then the transistor performance is improved, but gate induced drain leakage (GIDL) characteristics deteriorate
Solution Approach 1:
The gate electrode is divided into multiple segments: a lower gate electrode, an upper gate electrode, and vertical gate electrodes connecting them. This segmentation allows different portions of the gate to have different work functions, with the lower gate having a higher work function to reduce GIDL and the upper gate having a lower work function to maintain high transistor performance.
Solution Approach 2:
Different regions of the gate structure are assigned different material properties. The lower gate electrode uses a high work function material to specifically address GIDL at the drain-gate interface, while the upper gate electrode uses a low work function material to optimize overall transistor performance. This local differentiation of material properties resolves the contradiction between performance and leakage.
2Productivity
If threshold voltage control is enhanced for high-performance operation, then transistor operation performance is improved, but device complexity increases
Solution Approach 1:
The gate is segmented into lower, upper, and vertical components with different work functions, enabling independent control of threshold voltage and GIDL characteristics. This segmentation provides the necessary complexity to achieve superior threshold voltage control while maintaining manageable device architecture.
Solution Approach 2:
The gate structure employs composite materials with different work functions in different regions. The lower gate uses high work function material, the upper gate uses low work function material, and vertical gates use appropriate materials to connect them. This composite approach enables precise threshold voltage control through the combined effect of different materials.
Data Source
AI summary
A method for fabricating a semiconductor device includes forming a trench in a substrate, forming a gate dielectric layer on a surface of the trench, forming a lower gate, which partially fills the trench, over the gate dielectric layer, forming a low work function layer over the lower gate, forming a spacer over the low work function layer, etching the low work function layer to be self-aligned with the spacer in order to form vertical gate on both upper edges of the lower gate, and forming an upper gate over the lower gate between inner sidewalls of the vertical gate.