Buried-Gate Semiconductor Device Metal Gate Formation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Buried-gate semiconductor devices face limitations with polysilicon gates, including polydepletion, incompatibility with high dielectric constant materials, and high gate resistivity, especially when scaling down, and the formation of metal silicide gates is challenging due to limited diffusion length and limited deposition options for metal materials.
Innovation Solution
A method for manufacturing semiconductor devices with a buried gate region that involves forming a cavity under the channel region, filling it with a first material, and substituting it with aluminum or another semiconductor material through diffusion, allowing for the formation of a metal gate even in cavities inaccessible by standard deposition methods, enabling the production of NMOS and PMOS devices with adjusted threshold voltage by controlling the relative quantities of materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a polysilicon gate is used in buried-gate devices, then the device structure can be formed, but polydepletion occurs and gate resistivity becomes too high
Solution Approach 1:
The patent changes the material parameter of the gate from polysilicon to metal, fundamentally altering the electrical properties. This substitution eliminates polydepletion effects and reduces gate resistivity, directly resolving the harmful factors associated with polysilicon gates while maintaining the buried-gate structural benefits
Solution Approach 2:
The patent employs a sacrificial polysilicon layer that is temporarily present during manufacturing but is ultimately replaced by metal. This sacrificial layer serves its purpose during the formation process and is then discarded in favor of the superior metal gate material, allowing for complex cavity formation followed by material substitution
2Reliability
If metal gate material is deposited under channel regions at the end of transistor production, then metal gate devices can be formed, but the number of suitable metals is limited and production remains difficult
Solution Approach 1:
The patent performs preliminary actions by forming the cavity structure and depositing sacrificial polysilicon material before the final metal gate formation. This sequence allows the cavity to be prepared in advance, making subsequent metal deposition or substitution easier and expanding material choices
Solution Approach 2:
The patent introduces sacrificial polysilicon as an intermediary material that facilitates the formation process. This intermediate layer enables cavity creation and serves as a placeholder that can be replaced by various metal materials, thereby expanding the range of suitable gate metals beyond what would be directly depositable
3Ease of manufacture
If metal silicide is used as gate material with deposition on lateral walls of polysilicon, then gate formation is attempted, but poor formation occurs due to limited diffusion length
Solution Approach 1:
The patent uses sacrificial polysilicon as an intermediary that is deposited in a cavity rather than on lateral walls. This intermediate structure provides a controlled environment for material substitution or diffusion, ensuring complete and uniform gate material formation without the limitations of lateral wall deposition geometry
Solution Approach 2:
Instead of depositing metal on the lateral walls of existing polysilicon structures, the patent inverts the approach by first creating a cavity, filling it with sacrificial material, and then substituting or diffusing the final gate material. This inverted sequence ensures complete material replacement and eliminates diffusion length limitations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method allows for the production of buried-gate semiconductor devices with improved gate formation, enabling efficient adjustment of threshold voltage and reducing production complexity, while overcoming the limitations of polysilicon gates and limited metal deposition options.
Implementation Method 1
a substitution of the first material by aluminum, or the formation of a third material by diffusion of the second semiconductor material into the first material
Data Source
AI summary
A semiconductor device includes a semiconductor channel region and a gate region, wherein the gate region includes at least one buried part extending under the channel region. The buried part of the gate region is formed from a cavity under the channel region. The cavity is filled with a first material. An opening is made to access the first material. In one implementation, aluminium is deposited in the opening in contact with the first material. An anneal is performed to cause the aluminium to be substituted for the first material in the cavity. In another implementation, a second material different from the first material is deposited in the opening. An anneal is performed to cause an alloy of the first and second materials to be formed in the cavity.