Buried Gate Semiconductor With Si-Doped TiN for Void-Free Deposition

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Solution Overview

Problem

Existing semiconductor devices with buried gate structures face challenges in controlling threshold voltage and gate-induced drain leakage (GIDL) due to issues with impurities and void formation in metal nitride layers, which affect performance and reliability.

Innovation Solution

The implementation of silicon-doped titanium nitride with a silicon concentration of less than 1% is used to form conductive layers within the semiconductor device, ensuring void-free deposition through controlled atomic layer deposition processes, thereby improving film quality and reducing resistivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If metal nitride layer is deposited in buried gate structure, then conductivity is improved, but voids and impurities form reducing reliability

Engineering Contradiction:
Improvedevice reliabilityVSAvoidfilm quality
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent changes the chemical composition parameters of the metal nitride layer by adding silicon dopant at controlled concentrations (0.1-5 at%). This parameter modification transforms the film properties to achieve void-free deposition while maintaining good conductivity, resolving the contradiction between reliability and manufacturing precision

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates a composite material system by combining metal nitride (TiN, TaN, WN) with silicon dopant. This composite approach leverages the conductive properties of metal nitride while silicon addition prevents void formation, simultaneously improving both reliability and film quality

Inventive Principle:
Principle #40Composite materials

2Manufacturing precision

If silicon concentration is increased in metal nitride, then void formation is reduced, but threshold voltage control deteriorates

Engineering Contradiction:
Improvefilm densityVSAvoidthreshold voltage control
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent optimizes the silicon concentration parameter within a specific range (0.1-5 at%, preferably 0.5-2 at%). This precise parameter control achieves the dual benefit of reducing void formation while maintaining threshold voltage control, resolving the contradiction between film density and device performance

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability and performance of semiconductor devices by minimizing impurities and voids, thereby improving threshold voltage control and reducing gate-induced drain leakage.

Implementation Method 1

The present invention can deposit void-free titanium nitride by controlling the concentration of silicon to be less than 1 at % during silicon-doped titanium nitride deposition.

Methodology Applied
Scientific EffectAtomic layer deposition: Chemical Vapour Deposition

Data Source

PatentUS20260059840A1Semiconductor device and method for manufacturing the same
Publication Date: 2026.02.26 SK HYNIX INC
  • US20260059840A1 patent drawing
  • US20260059840A1 patent drawing
  • US20260059840A1 patent drawing

AI summary

The present invention relates to a semiconductor device with improved reliability and a method for manufacturing the same. A semiconductor device according to the present invention may comprise: a substrate including a gate trench; a gate insulating layer formed on a surface of the gate trench; and silicon-doped metal nitride on the gate insulating layer, wherein the silicon-doped metal nitride has a silicon concentration of less than 1 at %.