Buried Gate Semiconductor Structure with Strained Silicon
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Solution Overview
Problem
The challenge in semiconductor manufacturing is to continue reducing the size of semiconductor devices while maintaining performance and integration density, which is hindered by the need for sophisticated and expensive exposure techniques, and existing silicon layers have limited carrier mobility.
Innovation Solution
A semiconductor structure with a buried gate, buried source and drain contacts, and strained silicon layers is developed, where silicon germanium stressors create wider interatomic spaces in the substrate, enhancing carrier mobility and reducing device size through a buried gate structure and strained silicon layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If new and expensive exposure techniques are used to form fine patterns, then the integration density of semiconductor devices can be increased, but the manufacturing cost and process complexity increase
Solution Approach 1:
The patent transitions from planar device architecture to a three-dimensional structure with buried gates and strained silicon layers. By adding vertical dimensionality through buried gate structures and layered strained silicon configurations, the device achieves higher integration density without requiring more complex planar exposure techniques, thus resolving the contradiction between integration density and manufacturing complexity
Solution Approach 2:
The patent introduces strained silicon layers that modify the physical parameters of the semiconductor material by inducing mechanical strain. This changes the carrier mobility parameter fundamentally, allowing performance improvement through material parameter modification rather than through more complex fabrication processes, thereby addressing the integration density versus complexity contradiction
2Reliability
If silicon layers are used without strain, then the manufacturing process is simpler, but carrier mobility is limited and performance is reduced
Solution Approach 1:
The patent applies strain to the silicon lattice by introducing silicon germanium layers with different lattice constants, fundamentally changing the physical parameters of the silicon material. This strain modification increases carrier mobility without requiring complex manufacturing processes, as the strain is introduced through standard epitaxial growth techniques, thus resolving the contradiction between reliability and ease of manufacture
Solution Approach 2:
The patent creates a composite structure combining silicon and silicon germanium layers. The silicon germanium acts as a stressor layer that induces strain in the adjacent silicon channel, improving carrier mobility. This composite material approach achieves enhanced performance through material composition rather than process complexity, addressing the contradiction between reliability and manufacturing simplicity
3Volume of moving object
If device size is reduced to improve performance and capacity, then integration density increases, but sophisticated and expensive exposure techniques are required
Solution Approach 1:
The patent reduces device footprint by implementing buried gate structures that extend vertically into the substrate, utilizing the third dimension to achieve higher integration density. This vertical architecture allows smaller planar dimensions without requiring more sophisticated planar exposure techniques, as the miniaturization is achieved through vertical stacking rather than lateral scaling
Solution Approach 2:
The patent employs nested structures where buried gates are positioned within the substrate volume, and strained silicon layers are embedded within the device architecture. This nesting approach maximizes the use of available three-dimensional space, achieving compact device sizes without requiring proportionally more complex exposure processes, thus resolving the contradiction between device size reduction and exposure technique sophistication
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in improved carrier mobility, lower energy consumption, and greater reliability, enabling better performance and reduced costs while maintaining high integration density.
Implementation Method 1
Strained silicon is a layer of silicon in which the silicon atoms are stretched beyond their normal interatomic distance. Moving these silicon atoms farther apart reduces the atomic forces that interfere with the movement of electrons through the transistors and thus improves carrier mobility
Implementation Method 2
This can be accomplished by putting the layer of silicon over a substrate of, for example, silicon germanium (SiGe), in which the atoms are arranged farther apart than those of a silicon substrate
Data Source
AI summary
The present disclosure provides a semiconductor structure and a method for preparing the semiconductor structure. The semiconductor structure includes a substrate; a drain disposed in the substrate; a drain contact disposed in the drain; a source disposed in the substrate; a source contact disposed in the source; a gate structure with a bottom disposed in the substrate between the drain and the source; a channel disposed at the bottom of the gate structure connecting the drain and the source; a drain stressor disposed in the drain between the gate structure and the drain contact; a drain strained silicon layer disposed in the substrate surrounding the drain stressor connected to the channel; a source stressor disposed in the source between the source contact and the gate structure; and a source strained silicon layer disposed in the substrate surrounding the source stressor connected to the channel.