Buried Gate Transistor Work Function Control
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Solution Overview
Problem
Buried gate-type transistors face challenges in controlling threshold voltage and reducing gate-induced drain leakage (GIDL), which affect their performance and refresh characteristics in memory cells.
Innovation Solution
A semiconductor device with a buried gate structure is fabricated by forming a gate trench in a semiconductor substrate, including a gate dielectric layer, a work function layer, and a gate conductive layer, with doped regions and a capping layer, where the work function layer is adjusted using tilt-implantation and vertical implantation processes to control the threshold voltage and reduce GIDL.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal gate electrode is used for high-performance transistor, then the transistor performance is improved, but the threshold voltage control becomes difficult and gate-induced drain leakage (GIDL) increases
Solution Approach 1:
The patent applies local quality by creating a work function layer with spatially varying composition - the first portion has a different work function than the second portion. This allows different regions of the gate to provide different electrical characteristics, enabling precise threshold voltage control while maintaining the benefits of a metal gate electrode for high-performance operation.
Solution Approach 2:
The patent changes the work function parameter across different portions of the gate electrode. By adjusting the work function of the first portion relative to the second portion, the invention enables independent control of threshold voltage and GIDL characteristics, resolving the contradiction between transistor performance and threshold voltage control precision.
2Reliability
If a metal gate electrode is used for high-performance transistor, then the transistor performance is improved, but gate-induced drain leakage (GIDL) increases
Solution Approach 1:
The patent applies local quality by creating a work function layer with spatially varying composition - the first portion has a different work function than the second portion. This allows different regions of the gate to provide different electrical characteristics, enabling precise threshold voltage control while maintaining the benefits of a metal gate electrode for high-performance operation.
Solution Approach 2:
The patent changes the work function parameter across different portions of the gate electrode. By adjusting the work function of the first portion relative to the second portion, the invention enables independent control of threshold voltage and GIDL characteristics, resolving the contradiction between transistor performance and threshold voltage control precision.
3Ease of manufacture
If conventional gate structure is used, then fabrication is simpler, but refresh characteristics of memory cells are poor
Solution Approach 1:
The patent segments the gate structure into multiple functional layers - a gate dielectric layer, a work function layer with first and second portions having different work functions, and a gate conductive layer. This segmentation allows independent optimization of different gate regions to improve refresh characteristics while maintaining fabrication feasibility through sequential layer formation processes.
Solution Approach 2:
The patent employs composite materials by combining multiple layers with different properties - the gate dielectric layer provides electrical isolation, the work function layer with varying composition provides threshold voltage control, and the gate conductive layer provides electrical connectivity. This composite structure improves refresh characteristics while remaining compatible with standard semiconductor fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively controls the threshold voltage and reduces GIDL, improving the refresh characteristics and operational efficiency of memory cells by optimizing the work function layers and doping processes.
Implementation Method 1
doping a low work function adjustment element into a portion of the first work function layer to form a second work function layer. The doping of the work function adjustment element may be performed at a tilted angle with respect to the sidewalls of the gate trench through a tilt-implantation process.
Implementation Method 2
doping a second work function adjustment element into undoped portion of the first work function layer to form a third work function layer which overlaps with a bottom surface of the gate trench. The doping of the work function adjustment element may be performed in a vertical direction with respect to the bottom surface of the gate trench through a vertical implantation process.
Data Source
AI summary
A method for fabricating a semiconductor device includes: forming a gate trench in a semiconductor substrate; forming a gate dielectric layer over a bottom surface and sidewalls of the gate trench; forming a first work function layer over the gate dielectric layer; doping a work function adjustment element to form a second work function layer which overlaps with the sidewalls of the gate trench; forming a gate conductive layer that partially fills the gate trench; and forming doped regions inside the semiconductor substrate on both sides of the gate trench.