Semiconductor Termination Structure With Buried Guard Ring and JTE

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Solution Overview

Problem

Conventional termination structures in power transistors require larger die sizes and are sensitive to breakdown voltage, failing to fully meet the requirements of power electronic applications due to high electric field accumulation and limited process window.

Innovation Solution

The implementation of a junction termination extension structure and a buried guard ring in the termination region of a semiconductor device, which reduces surface electric fields and extends the depletion region, thereby minimizing the termination edge width and enhancing breakdown voltage sensitivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional termination structures (field plates, floating guard rings, junction termination extensions) are used, then breakdown voltage can be achieved, but termination edge width increases leading to larger die size

Engineering Contradiction:
Improvebreakdown voltageVSAvoiddie size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The termination structure is segmented into multiple functional components: a junction termination extension (JTE) structure with graded doping concentration, and a buried guard ring structure positioned beneath the JTE. This segmentation allows each component to address specific electric field management needs, achieving high breakdown voltage with reduced termination width compared to conventional single-structure approaches.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The JTE structure employs graded doping concentration where the doping level varies spatially - higher near the main junction and lower toward the termination edge. This local quality variation optimizes the electric field distribution across the termination region, enabling effective field control with minimal termination width.

Inventive Principle:
Principle #3Local quality

2Reliability

If conventional termination structures are used, then breakdown voltage can be achieved, but the structure becomes sensitive to spacing width variations reducing process window

Engineering Contradiction:
Improvebreakdown voltageVSAvoidprocess window
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The JTE structure utilizes graded doping concentration as a key parameter change, transitioning from uniform doping in conventional structures to spatially varying doping levels. This parameter change provides tolerance to spacing width variations during fabrication, enlarging the process window while maintaining breakdown voltage performance.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If larger termination edge width is used to achieve high breakdown voltage, then breakdown voltage requirement is met, but die size increases

Engineering Contradiction:
Improvebreakdown voltageVSAvoiddie size
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The buried guard ring structure adds a vertical dimension to the termination design by positioning doped regions beneath the surface JTE structure. This dimensional transition allows electric field control in the depth direction, reducing the required lateral termination width and thereby minimizing die size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces the die size and enlarges the process window for semiconductor device fabrication while maintaining high breakdown voltage, and allows for simultaneous formation of the buried guard ring and shielding doped region using a single ion implantation process, reducing fabrication costs and complexity.

Implementation Method 1

An ion implantation process is performed on the epitaxial layer to form a shielding doped region in the cell region, and to form a buried guard ring and a junction termination extension structure in the termination region

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS20250006834A1Semiconductor device and fabrication method thereof
Publication Date: 2025.01.02 VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
  • US20250006834A1 patent drawing
  • US20250006834A1 patent drawing
  • US20250006834A1 patent drawing

AI summary

A semiconductor device includes a substrate having a first conductivity type and including a cell region and a termination region. A trench is disposed in the substrate and located in the cell region, and a gate electrode disposed in the trench. A shielding doped region having a second conductivity type is disposed in the substrate and directly below the trench. A buried guard ring having the second conductivity type is disposed in the substrate and located in the termination region. The buried guard ring and the shielding doped region are disposed at the same depth in the substrate. In addition, a junction termination extension structure having the second conductivity type is disposed in the substrate, located directly above and separated from the buried guard ring.