Buried IDT SAW Resonator Planarization for Insertion Loss
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Solution Overview
Problem
The quality factor and temperature coefficient of surface acoustic wave (SAW) resonators with buried interdigital transducers (IDTs) are degraded by voids and poor planarity in silicon dioxide layers, leading to increased insertion loss and reduced performance.
Innovation Solution
A double etchback planarization process is used to deposit a silicon oxide layer thicker than the IDT metal thickness, followed by an overcoat to ensure flatness and eliminate voids, improving the quality factor and coupling coefficient of the resonator.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a silicon dioxide layer is deposited over the IDT electrodes to provide temperature compensation, then the temperature characteristics of the SAW filter are improved, but voids form in the oxide layer that degrade the quality factor and increase insertion loss
Solution Approach 1:
A planarization layer is deposited before the temperature compensation oxide layer to pre-establish a flat surface. This preliminary action prevents void formation during subsequent oxide deposition, eliminating the harmful effect while preserving the temperature compensation benefit.
Solution Approach 2:
The planarization layer acts as an intermediary between the IDT electrodes and the temperature compensation oxide layer. It mediates the interaction by providing a flat substrate that prevents void formation, allowing the oxide layer to be deposited uniformly without defects.
2Stability of the object's composition
If the oxide layer thickness is increased to improve temperature compensation, then the temperature stability is enhanced, but the quality factor decreases due to void formation
Solution Approach 1:
The planarization layer is deposited in advance to create a flat surface before thickness-critical oxide layer deposition. This allows the oxide layer to be deposited to the required thickness for temperature compensation without forming voids, maintaining both temperature stability and quality factor.
3Ease of manufacture
If a single layer of silicon dioxide is deposited to cover the electrodes, then the process is simple, but the top surface exhibits poor planarity that degrades resonator performance
Solution Approach 1:
The oxide structure is segmented into two functional layers: a planarization layer that provides a flat surface, and a temperature compensation oxide layer that provides thermal stability. This segmentation separates the planarity function from the temperature compensation function, achieving both goals while maintaining process simplicity.
4Ease of manufacture
If the oxide layer is deposited directly over the electrodes without planarization, then the manufacturing process is simplified, but insertion loss increases due to voids and poor planarity
Solution Approach 1:
A planarization layer is deposited as a preliminary step before the temperature compensation oxide layer. This preliminary planarization prevents void formation and ensures good surface contact, eliminating the source of insertion loss while adding only one process step.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces voids and enhances the planarity of the silicon oxide layer, resulting in improved insertion loss and quality factor of SAW filters, making them more effective for temperature-compensated surface acoustic devices.
Implementation Method 1
When a radio frequency (RF) field is applied to the opposing electrodes, the piezoelectric material will convert electrical energy to mechanical energy in the form of acoustic waves
Implementation Method 2
the linear coefficient of expansion of the silicon dioxide layer is opposite the acoustic temperature coefficient for that of LT or LN piezoelectric substrates
Data Source
AI summary
A SAW device having metal electrodes on a surface of the piezoelectric substrate includes a dielectric layer deposited on the surface. Depositing the layer results in seams extending upward from the electrodes extending above the surface of the substrate. An additional seam results from one seam extending from one electrode joining a second seam extending from an adjacent electrode within the dielectric layer and is generally formed above the height of the electrodes. The additional seam is removed through planarization or the like. The dielectric layer may be further planarized for providing a thickness of the dielectric layer above the electrodes as desired.