Buried Insulation Layer Contact Structures Mitigate Kink Effect
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Solution Overview
Problem
The kink effect in semiconductor devices, particularly in thin semiconductor layers on SOI substrates, affects the operation performance of switching and high-voltage transistors, necessitating integrated structure design and manufacturing methods for different types of semiconductor devices.
Innovation Solution
A semiconductor device and manufacturing method that include a buried insulation layer, a semiconductor layer, a gate structure, source and drain doped regions, and contact structures that penetrate the buried insulation layer to electrically connect the body region with the source and drain doped regions, improving the kink effect by reducing the influence on the total area and enabling miniaturization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the semiconductor layer is made thinner to enhance switching device performance, then the switching device performance is improved, but the kink effect occurs and affects high voltage transistor performance
Solution Approach 1:
The patent introduces a vertical dimension by forming contact structures that penetrate through the buried insulation layer to directly contact the body region of the semiconductor layer. This three-dimensional contact approach allows electrical connection without requiring lateral extension, thereby reducing the kink effect while maintaining switching device performance.
Solution Approach 2:
The patent segments the electrical connection path by creating separate contact structures for different regions (body region and source/drain regions). This segmentation allows independent optimization of each contact, enabling the body region contact to be positioned optimally to minimize kink effect while maintaining electrical connectivity.
2Productivity
If the density of functional devices is increased to enhance chip performance, then the chip performance is improved, but the influence of electrical properties becomes more obvious and hinders scaling down
Solution Approach 1:
By transitioning from planar device layout to vertical contact structures, the patent enables higher device density without compromising electrical performance. The vertical penetration contacts allow closer spacing of devices while maintaining proper electrical connections, thus supporting continued scaling down.
3Reliability
If contact structures are formed to electrically connect the body region and source doped region, then the kink effect is improved, but the device area increases
Solution Approach 1:
The patent uses vertical penetration contacts that extend through the buried insulation layer in the depth direction, rather than using lateral extensions. This vertical approach minimizes the lateral footprint of the contact structures, reducing the overall device area while still achieving the electrical connection needed to mitigate the kink effect.
Data Source
AI summary
A semiconductor device includes a buried insulation layer, a semiconductor layer, a gate structure, a source doped region, and a drain doped region. The semiconductor layer is disposed on the buried insulation layer. The gate structure is disposed on the semiconductor layer. The semiconductor layer includes a body region disposed between the gate structure and the buried insulation layer. The source doped region and the drain doped region are disposed in the semiconductor layer. A first contact structure penetrates the buried insulation layer and contacts the body region. A second contact structure penetrates the buried insulation layer and is electrically connected with the source doped region. At least a part of the first contact structure overlaps the body region in a thickness direction of the buried insulation layer. The body region is electrically connected with the source doped region via the first contact structure and the second contact structure.