Buried Interface Tie Noise Suppression for TSVs
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Solution Overview
Problem
Three-dimensional integrated circuits face significant challenges in suppressing substrate noise coupling due to currents on through silicon vias (TSVs), as conventional noise shielding methods, such as guard rings, are ineffective and consume valuable active circuit area, especially in silicon-on-insulator technologies.
Innovation Solution
The implementation of buried interface tie (BITIE) cells, which are compact and provide noise isolation by being in contact with the substrate beneath an oxide layer, creating a low-impedance path to ground and isolating TSVs from active devices, thereby reducing noise coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If conventional guard ring structures are used for noise shielding, then substrate noise coupling is suppressed, but active circuit area is sacrificed and wiring flexibility is reduced
Solution Approach 1:
The patent transitions from two-dimensional guard ring structures to three-dimensional buried interface tie structures that extend vertically into the substrate. This dimensional change allows noise suppression functionality to be achieved without consuming lateral active circuit area, as the BITIE structures utilize the vertical dimension beneath the active devices.
Solution Approach 2:
The buried interface tie structures are nested beneath the active circuit devices, utilizing the substrate region directly under the active area. This nesting approach allows the noise suppression structure to occupy space that would otherwise be unused, eliminating the need for separate guard ring structures that consume valuable lateral area.
2Object-affected harmful factors
If conventional guard ring structures are used for noise shielding, then substrate noise coupling is suppressed, but wiring flexibility near TSV is reduced
Solution Approach 1:
By moving the noise suppression function to the vertical dimension with buried interface ties, the lateral wiring space is freed up. This allows wires and interconnects to be routed more flexibly near through-silicon vias without being constrained by large lateral guard ring structures.
Solution Approach 2:
The noise suppression function is segmented into discrete buried interface tie structures that can be selectively placed only where needed near TSVs, rather than requiring continuous large-area guard rings. This segmentation allows wiring to pass through areas without noise suppression structures.
3Object-affected harmful factors
If thin dielectric liners are used on TSVs to prevent direct current contact, then substrate noise coupling is reduced, but high-frequency noise penetration is not effectively prevented
Solution Approach 1:
The buried interface tie structures act as intermediary elements that provide a controlled low-impedance path to ground for noise currents. Rather than relying on thin dielectric liners that fail at high frequencies, the BITIE structures serve as active intermediary components that effectively shunt high-frequency noise to ground through their low inductance connection.
Solution Approach 2:
The patent changes the impedance parameter by creating a low-impedance path to ground through the buried interface tie structures. This low-impedance path effectively shunts high-frequency noise currents, changing the electrical parameters to favor noise suppression at high frequencies where dielectric liners fail.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
BITIE cells effectively confine displacement currents away from device contacts, reducing noise interference and allowing for higher density and flexibility in three-dimensional circuit design, enabling closer component placement without sacrificing active circuit area.
Implementation Method 1
create a low-impedance path to ground
Implementation Method 2
confine displacement currents away from device contacts
Data Source
AI summary
Circuits for shielding devices from electromagnetic coupling with through-silicon vias are shown that include a substrate having a through via, which provides access to a device layer on a first surface of the circuit to a device layer on a second surface of the circuit; a conductive layer on the first side of the substrate; a contact point on one of the device layers; and a grounded buried interface tie on the conductive layer, adjacent to the contact point, to isolate the contact point from coupling noise.