Buried Layer Insulation via Opposite Conductivity
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Solution Overview
Problem
Conventional semiconductor manufacturing processes require large substrate areas due to the need for significant inter-layer distance between buried layers to achieve effective insulation, which complicates the manufacturing process and increases the area budget.
Innovation Solution
A semiconductor device manufacturing method involving the formation of patterned hard mask layers, ion implantations to create buried layers and separation regions with specific conductive types, followed by an annealing process to diffuse dopants and form connection components, allowing for closer inter-layer distances and reduced substrate area usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high doping concentration is used in the buried layer to achieve good vertical insulation, then the insulation performance is improved, but the inter-layer distance must be relatively large, resulting in a large substrate area
Solution Approach 1:
The patent introduces a separation region with opposite conductive type between adjacent buried layers of the same conductive type. This parameter change in conductive type allows the buried layers to be electrically isolated from each other, enabling reduced inter-layer distance and smaller substrate area while maintaining insulation performance.
Solution Approach 2:
The separation region acts as an intermediary between adjacent buried layers, providing electrical isolation through its opposite conductive type. This intermediary structure enables the buried layers to be placed closer together without compromising the insulation between them.
2Reliability
If a relatively large inter-layer distance is maintained between buried layers to achieve insulation, then the insulation between buried layers is improved, but the substrate area budget increases
Solution Approach 1:
The patent changes the conductive type parameter of the separation region to be opposite to that of adjacent buried layers. This parameter change enables effective insulation between buried layers at reduced inter-layer distances, thereby decreasing the required substrate area while maintaining insulation reliability.
3Area of stationary object
If multiple buried layers are placed closer together to reduce substrate area, then the substrate area budget is reduced, but achieving effective insulation between them becomes more difficult
Solution Approach 1:
The patent applies parameter changes by assigning opposite conductive types to separation regions between adjacent buried layers. This enables effective electrical insulation even when buried layers are placed at closer inter-layer distances, thus reducing substrate area without compromising insulation reliability.
Solution Approach 2:
The patent segments the substrate into distinct regions with alternating conductive types - buried layers with one conductive type and separation regions with the opposite conductive type. This segmentation creates natural electrical isolation between adjacent buried layers, enabling closer placement while maintaining insulation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces the substrate area required for semiconductor devices by enabling effective insulation between buried layers with closer inter-layer distances, simplifying the manufacturing process and optimizing space for semiconductor devices.
Implementation Method 1
conducting a first ion implantation using the first hard mask layer as a mask to form a first buried layer at a first side of the first hard mask layer and a second buried layer at a second side of the first hard mask layer in the substrate
Implementation Method 2
conducting an annealing process after the semiconductor layer is formed, and in the aforementioned method, the first and the second buried layers may both comprise a first dopant and a second dopant, with the second dopant having a lighter atomic weight than the first dopant, and the annealing process may cause at least a portion of the second dopant in the first and the second buried layers to diffuse to the semiconductor layer
Data Source
AI summary
A semiconductor device and its manufacturing method, relating to semiconductor techniques. The semiconductor device manufacturing method comprises: forming a patterned first hard mask layer on a substrate to define a position for buried layers; conducting a first ion implantation using the first hard mask layer as a mask to form a first buried layer and a second buried layer both having a first conductive type and separated from each other at two sides of the first hard mask layer in the substrate; conducting a second ion implantation to form a separation region with a second conductive type opposite to the first conductive type in the substrate between the first and the second buried layers; removing the first hard mask layer; and forming a semiconductor layer on the substrate. This inventive concept reduces an area budget of a substrate and simplifies the manufacturing process.