Buried Layer Photodetector for CMOS Integration

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Solution Overview

Problem

Conventional methods for creating photodiodes face limitations in achieving high Photon Detection Efficiency (PDE) while allowing for CMOS integration and multipixel designs, as they either compromise on PDE for integration or do not support thick vertical regions necessary for efficient long-wavelength detection.

Innovation Solution

The use of an epitaxial growth and buried layer process, which includes a substrate layer, buried layer, intrinsic layer, plug layer, p-plus layer, n-plus layer, and pre-metal dielectric layer, with trenches and n-type epitaxial layers, enables a thicker vertical region for improved PDE and allows for CMOS integration without sacrificing detection efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a vertical process with top and bottom contact is used to create a thick vertical region for improved PDE, then Photon Detection Efficiency is improved, but CMOS integration capability deteriorates

Engineering Contradiction:
ImprovePhoton Detection EfficiencyVSAvoidCMOS integration capability
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The photodetector structure is segmented into distinct functional layers: an intrinsic layer for photon absorption, a p-plus layer for hole collection, and an n-plus layer for electron collection. This segmentation allows each layer to be optimized independently, enabling thick intrinsic regions for high PDE while maintaining CMOS compatibility through standardized contact structures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention transitions from conventional planar photodetector designs to a vertically stacked three-dimensional architecture. By stacking the intrinsic layer, p-plus layer, and n-plus layer vertically, the design achieves thick absorption paths for improved PDE while maintaining a compact footprint that is compatible with CMOS integration and multipixel array configurations.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If a CMOS compatible process is used to allow for good integration, then ease of manufacture is improved, but Photon Detection Efficiency deteriorates due to inability to create thick vertical regions

Engineering Contradiction:
Improveintegration capabilityVSAvoidPhoton Detection Efficiency
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The photodetector design achieves multi-functionality by combining CMOS-compatible fabrication processes with enhanced photodetection performance. The standard CMOS process steps (oxidation, deposition, etching, doping) are used to create the intrinsic, p-plus, and n-plus layers, enabling integration with existing CMOS manufacturing infrastructure while achieving thick intrinsic regions for high PDE through optimized layer thicknesses and doping profiles.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If a thick vertical region is created to improve PDE for long-wavelength detection, then Photon Detection Efficiency is improved, but device complexity increases

Engineering Contradiction:
ImprovePhoton Detection EfficiencyVSAvoidstructural complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The invention applies local quality by creating a thick intrinsic layer specifically in the region where photon absorption is needed, while keeping other regions (contact areas, interconnect regions) relatively simple. The intrinsic layer thickness is locally optimized for long-wavelength detection, while the overall device structure maintains simplicity through standardized contact configurations and integration with existing CMOS processes.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances Photon Detection Efficiency (PDE) by enabling the detection of long-wavelength photons with improved integration capabilities, achieving up to 50% PDE compared to conventional Silicon photomultipliers, while maintaining manufacturing flexibility and compatibility with CMOS devices.

Implementation Method 1

an intrinsic layer deposited upon a first portion of a first surface area of the buried layer... a portion of a surface area of the PMD layer may be configured to receive a photon... a portion of a second surface area of the substrate layer may be configured to receive a photon

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS11217718B2Photodetector with a buried layer
Publication Date: 2022.01.04 ALLEGRO MICROSYSTEMS LLC
  • US11217718B2 patent drawing
  • US11217718B2 patent drawing
  • US11217718B2 patent drawing

AI summary

According to an embodiment of the present disclosure, a photodetector device can include a substrate layer; a bottom contacting layer disposed over a surface of the substrate layer and having a first contacting region and a second contacting region, the bottom contacting layer providing a low resistance path between the first and second contacting regions; an insulating layer disposed over a surface of the bottom contacting layer; an intrinsic region disposed within the insulating layer, the intrinsic region in electrical contact with the first contacting region of the bottom contacting layer, the intrinsic region comprising a low band-gap material; a metal contact disposed within the insulating layer and in electrical contact with the second contacting region of the bottom contacting layer; an anode in electrical contact with the intrinsic region; and a cathode in electrical contact with the metal contact.