Buried Layer in High-Voltage Semiconductor Devices
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Solution Overview
Problem
Ultra-high voltage semiconductor devices face challenges in achieving high breakdown voltage and low specific on-resistance due to limited doping concentration in the grade region, which restricts their performance.
Innovation Solution
Incorporating a buried layer and a pre-high-voltage well structure, vertically aligned with the drift region, allows for increased doping concentration in the high-voltage well and reduced specific on-resistance by forming a full depletion region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the doping concentration of the grade region is decreased to achieve high breakdown voltage, then the breakdown voltage increases, but the specific on-resistance increases
Solution Approach 1:
The invention divides the doping structure into multiple segments: a buried layer with first conductivity type, a high-voltage well with second conductivity type, and a drift region. This segmentation allows different regions to have optimized doping concentrations for their specific functions, enabling the grade region to maintain lower doping for high breakdown voltage while the buried layer provides additional charge compensation to control on-resistance
Solution Approach 2:
The invention applies local quality by creating a vertically aligned structure where the buried layer is positioned directly beneath the drift region. This localized configuration allows the buried layer to specifically address the on-resistance issue in the drift region without affecting the overall breakdown voltage characteristics, enabling independent optimization of both parameters
2Reliability
If a buried layer and pre-high-voltage well structure are added to reduce specific on-resistance, then the specific on-resistance decreases by approximately 16%, but the device structure becomes more complex
Solution Approach 1:
The invention merges the functions of the buried layer and the high-voltage well into a vertically integrated structure. The buried layer with first conductivity type and the high-voltage well with second conductivity type are positioned adjacent to each other and vertically aligned with the drift region, combining their effects to simultaneously achieve low on-resistance and high breakdown voltage in a compact configuration
Solution Approach 2:
The invention transitions from a planar doping structure to a three-dimensional vertically aligned structure. By positioning the buried layer beneath and vertically aligned with the drift region, the invention utilizes the vertical dimension to create a more efficient charge distribution that reduces on-resistance without expanding the lateral device footprint
Data Source
AI summary
A semiconductor device includes a substrate having a first conductivity type, a high-voltage well having a second conductivity type and formed in the substrate, a drift region formed in the high-voltage well, and a buried layer having the first conductivity type formed below the high-voltage well and vertically aligned with the drift region.