Buried Oxide Backside Contact for Leakage-Safe Power Rails
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Solution Overview
Problem
Conventional back side contact fabrication in semiconductor devices faces challenges such as damage to sensitive materials, parasitic current leakage, and inefficiencies due to the thin bottom dielectric isolation layer, which can lead to defective devices and inefficiencies in chip design.
Innovation Solution
A semiconductor device with a buried oxide layer on the back side to protect electrical components and a method involving a stack of nanosheets, sacrificial layers, and a buried metal contact to form a back side power rail, allowing for efficient back side power delivery without damaging the placeholder material during substrate removal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a thin bottom dielectric isolation layer is used for back side contact, then chip real estate is freed up and power delivery efficiency is improved, but damage to sensitive materials and parasitic current leakage occur
Solution Approach 1:
A buried oxide layer is formed on the back side of the substrate before removing the substrate. This preliminary action creates a protective barrier that prevents damage to sensitive materials during subsequent substrate removal processes, while still enabling back side contact configuration
Solution Approach 2:
The buried oxide layer acts as an intermediary between the removed substrate and the underlying structures. It provides mechanical support and electrical isolation during the fabrication process, preventing direct exposure and damage to sensitive components while enabling back side power delivery
2Ease of manufacture
If substrate is removed from back side to enable power rail access, then back side power delivery is achieved, but placeholder material is damaged
Solution Approach 1:
The buried oxide layer is formed before substrate removal to protect placeholder material. This preliminary protective layer prevents damage during the aggressive substrate etching process while allowing the placeholder to maintain its structural integrity for subsequent power rail formation
3Reliability
If front side contact scheme is used, then electrical connections are established, but chip real estate is lost to power and signal connections
Solution Approach 1:
Instead of making electrical connections from the front side, the patent inverts the approach by establishing power delivery connections from the back side of the device. This inversion allows the front side to be fully dedicated to signal processing components, maximizing chip real estate utilization
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The buried oxide layer and nanosheet structure enable effective back side power delivery, reducing damage to electrical components and improving device efficiency by maintaining the integrity of the buried oxide layer and preventing parasitic current leakage.
Implementation Method 1
A buried oxide layer is positioned between the electronic components layer and the power rail
Implementation Method 2
A back side metal contact is buried in the buried oxide layer. The back side metal contact bridges one of the active components in the electronic components layer to the power rail
Data Source
AI summary
A semiconductor chip device includes an electronic components layer supported by the substrate. The electronic components layer includes a plurality of active component structures. A power rail is positioned on a back side of the electronic components layer. A buried oxide layer is positioned between the electronic components layer and the power rail. A back side metal contact is buried in the buried oxide layer. The back side metal contact bridges one of the active components in the electronic components layer to the power rail.