Buried Oxide Trench Integration for Low-Noise SOI MOSFETs

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Solution Overview

Problem

Existing semiconductor devices face challenges with high parasitic inductive noise and inefficient heat transfer due to the integration of components, which affects their performance and efficiency.

Innovation Solution

The integration of a substrate with a trench and a buried oxide layer, combined with epitaxially grown silicon layers, eliminates the need for wire bonding between devices and enhances heat transfer by forming an SOI CMOS and vertical MOSFET on the same substrate, utilizing silicon dioxide and silicon layers with specific thicknesses for improved electrical and thermal conductivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If components are integrated on the same substrate, then heat transfer efficiency is improved, but parasitic inductive noise increases

Engineering Contradiction:
Improveheat transfer efficiencyVSAvoidparasitic inductive noise
Core Design Contradiction:
TemperatureVSObject-generated harmful factors

Solution Approach 1:

The substrate is divided into multiple isolation trenches that segment the conductive paths between devices. This segmentation breaks up the parasitic inductive coupling while maintaining thermal contact through the trenches filled with thermally conductive material, thus resolving the contradiction between heat transfer efficiency and parasitic noise reduction.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A buried oxide layer is introduced as an intermediary between the semiconductor devices and the substrate. This oxide layer acts as an electrical insulator that reduces parasitic inductive noise while allowing thermal energy to pass through to the substrate, thereby improving heat transfer efficiency without increasing parasitic noise.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If wire bonding is used to connect devices, then electrical connection is achieved, but parasitic inductive noise increases

Engineering Contradiction:
Improveelectrical connectionVSAvoidparasitic inductive noise
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

Multiple devices are merged onto a single substrate with shared power and ground connections through the isolation trenches. This merging eliminates the need for separate wire bonds between devices, reducing parasitic inductive noise while maintaining reliable electrical connections through the integrated substrate structure.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The wire bonding process is extracted and eliminated by directly integrating the electrical connections into the substrate through the trench structure. The power and ground connections are taken out of the external wiring domain and embedded into the substrate itself, removing the source of parasitic inductive noise.

Inventive Principle:
Principle #2Taking out (Extraction)

3Object-generated harmful factors

If isolation trenches are added to reduce parasitic noise, then parasitic inductive noise is reduced, but device complexity increases

Engineering Contradiction:
Improveparasitic inductive noiseVSAvoidstructure complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The isolation trenches serve multiple functions simultaneously: they provide electrical isolation to reduce parasitic inductive noise, act as thermal pathways when filled with conductive material, and serve as mechanical support structures. This multi-functionality reduces the need for additional components and simplifies the overall device structure despite the added trenches.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces parasitic inductive noise and improves heat transfer efficiency, resulting in enhanced performance and reliability of integrated semiconductor devices.

Implementation Method 1

a buried oxide layer formed within the trench in the top surface of the substrate... The buried oxide layer may comprise silicon dioxide

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Implementation Method 2

A silicon layer may be epitaxially grown over the buried oxide layer and the top surface of the substrate

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 3

better heat transfer draining down to the substrate

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20260013224A1Integrated devices and method for manufacturing same
Publication Date: 2026.01.08 MICROCHIP TECHNOLOGY INC
  • US20260013224A1 patent drawing
  • US20260013224A1 patent drawing
  • US20260013224A1 patent drawing

AI summary

An integrated device comprising a buried oxide layer within a trench within a top surface of a substrate. A silicon layer formed over the buried oxide layer and the top surface of the substrate.