Buried P-Type Region in Extended Drain NMOS for Breakdown Voltage
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Solution Overview
Problem
Extended drain transistors face challenges in maintaining full depletion of the drift region under high substrate bias voltages, particularly when the transistor body thickness is relatively thin compared to the buried dielectric layer, leading to reduced off-state breakdown voltage and increased on-state resistance.
Innovation Solution
Incorporating a buried P type region with sufficient doping concentration in the semiconductor layer, electrically connected to the P well region, to provide an additional mechanism for depleting the N type drift region from the bottom, complementing the top depletion mechanisms, thereby ensuring full drift region depletion even under higher substrate bias.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the transistor body thickness is reduced to lower parasitic capacitance, then high frequency performance is improved, but the drift region cannot be fully depleted under high substrate bias, leading to reduced breakdown voltage
Solution Approach 1:
The patent introduces a vertical P-type region extending from the substrate up into the drift region, adding a third-dimensional depletion mechanism. This vertical dimension complements the horizontal depletion fields, enabling full drift region depletion even when the body thickness is reduced for high-frequency operation.
Solution Approach 2:
The P-type region acts as an intermediary structure between the substrate and the drift region. It provides an additional depletion field source that mediates the conflict between thin-body high-frequency performance and adequate breakdown voltage, allowing both requirements to be satisfied simultaneously.
2Loss of energy
If the drift region is made thinner to reduce on-state resistance, then conduction losses are reduced, but the depletion region cannot extend far enough to maintain breakdown voltage under substrate bias
Solution Approach 1:
By introducing the vertical P-type region, the patent creates an additional spatial dimension for depletion field generation. This allows the drift region to be thinner for low resistance while the vertical depletion fields from the P-type region ensure adequate breakdown voltage is maintained.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the off-state breakdown voltage by over 30% and improves the on-resistance characteristics of the transistor, allowing for efficient high voltage operation with reduced processing complexity and cost.
Implementation Method 1
The buried P type region has a sufficient doping to provide an additional mechanism for depleting the N type drift region from the bottom counteracting the higher substrate bias voltage
Data Source
AI summary
Described herein is an N type extended drain transistor formed from a semiconductor on insulator (SOI) wafer. The transistor has a buried P type region formed by the selective implantation of P type dopants in a semiconductor layer of the wafer at a location directly below a drift region of the transistor. The transistor also includes a source located in a P well region and a drain. The buried P type region is in electrical contact with the P well region. The N type drift region, the source, and the drain are also located in a portion of the semiconductor layer surrounded by dielectric isolation. A buried dielectric layer located below the portion of the semiconductor layer electrically isolates the portion of the semiconductor layer from a semiconductor substrate located below the buried dielectric layer.