Buried Polycrystalline Layer in Bulk Silicon for Device Isolation
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Solution Overview
Problem
Bulk silicon substrates suffer from poor device isolation due to harmonic generation, lacking the performance improvements offered by silicon-on-insulator (SOI) substrates, which are more costly.
Innovation Solution
The formation of trench isolation regions surrounding an active device region, accompanied by amorphizing and annealing processes to create non-single-crystal layers with varying widths beneath these regions, enhancing device isolation and reducing leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If bulk silicon substrates are used, then cost is reduced, but device isolation performance deteriorates due to harmonic generation
Solution Approach 1:
The substrate is segmented into distinct crystalline regions: a single-crystal active device region and a non-single-crystal (polycrystalline or amorphous) buried layer region. This segmentation is achieved through selective ion implantation that amorphizes the substrate beneath trench isolation regions while leaving the active device region intact. The segmented structure provides both cost-effectiveness (using bulk silicon) and improved device isolation (through the non-single-crystal buried layer that suppresses harmonic generation).
Solution Approach 2:
Different regions of the substrate are given different crystalline qualities to serve different functions. The active device region maintains single-crystal quality for optimal device performance, while the buried layer beneath trench isolation regions is converted to non-single-crystal structure to provide electrical isolation and suppress harmonics. This local differentiation of material properties resolves the contradiction between cost and isolation performance.
2Reliability
If SOI substrates are used, then device isolation performance is improved, but manufacturing cost increases
Solution Approach 1:
The invention creates a simplified version of the SOI substrate structure by forming a non-single-crystal buried layer in bulk silicon that mimics the isolation properties of the expensive silicon-oxide buried layer in SOI substrates. Instead of using the full SOI structure with thin device layers and oxide burial, this approach copies only the essential isolation function through selective amorphization, achieving similar performance at lower cost.
Solution Approach 2:
The invention replaces the expensive, complex SOI substrate structure with a simpler, cheaper bulk silicon substrate that undergoes selective modification. The bulk silicon substrate serves as a cost-effective base material that, when selectively amorphized, provides the necessary isolation properties without requiring the expensive layered structure of commercial SOI substrates.
3Ease of manufacture
If the non-single-crystal layer has uniform width, then manufacturing is simplified, but leakage reduction effectiveness decreases
Solution Approach 1:
The non-single-crystal layer is designed with asymmetric width characteristics: it has a first width beneath trench isolation regions and a second, narrower width beneath the active device region. This asymmetric geometry is achieved through selective ion implantation that creates different amorphization depths in different regions. The varying width optimizes leakage reduction by providing stronger isolation where needed while maintaining device performance in the active region.
Solution Approach 2:
Different sections of the non-single-crystal layer are given different widths to serve different functional requirements. The wider section beneath trench isolation regions provides maximum isolation and harmonic suppression, while the narrower section beneath the active device region minimizes impact on device performance. This local optimization of geometric properties enhances leakage reduction while maintaining device functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves device isolation and reduces leakage, mimicking the performance benefits of SOI substrates while maintaining the cost-effectiveness of bulk silicon substrates.
Implementation Method 1
amorphizing a crystal structure of the active device region and of the substrate beneath the trench isolation regions and the active device region to form amorphized semiconductor material
Implementation Method 2
annealing the substrate with an annealing process to convert the amorphized semiconductor material to include a non-single-crystal layer
Data Source
AI summary
Structures with altered crystallinity beneath semiconductor devices and methods associated with forming such structures. Trench isolation regions surround an active device region composed of a single-crystal semiconductor material. A first non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. A second non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. The first non-single-crystal layer is arranged between the second non-single-crystal layer and the active device region.