Buried Power Rail Contact Layout for Low-Resistance Backside PDN
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Solution Overview
Problem
Conventional power rails in semiconductor devices occupy significant area in interconnect layers, causing congestion and reducing space for other wires and connections, and the interfaces between different materials in the electrical signal path increase electrical resistance.
Innovation Solution
Buried power rails are formed in the semiconductor substrate with the bottom portion directly contacting the first metal layer of the backside power delivery network, using the same conductive material without liners, to reduce electrical discontinuities and increase contact area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power rails are placed in interconnect layers, then power delivery is achieved, but area consumption increases and wiring congestion occurs
Solution Approach 1:
The patent moves power rails from the horizontal plane (interconnect layers) to the vertical dimension (buried in semiconductor substrate), allowing power delivery without occupying interconnect layer area. This dimensional transition resolves the conflict between power delivery capability and available wiring space.
2Adaptability or versatility
If multiple material interfaces are used in the electrical signal path, then different material properties can be utilized, but electrical resistance increases
Solution Approach 1:
The patent uses the same conductive material for both the buried power rail and the backside power delivery network metal layer, eliminating material interfaces and reducing electrical resistance. This homogeneity approach prioritizes low resistance over material versatility.
Data Source
AI summary
An approach to form a semiconductor structure with a plurality of buried power rails in a semiconductor substrate where at least one buried power rail extends below the backside of the semiconductor substrate. The semiconductor structure provides at least one portion of the first metal layer of the backside power delivery network that surrounds a bottom portion of the buried power rail below the backside of the semiconductor substrate. The bottom portion of the buried power rail is in direct contact with the portion of the first metal layer of the backside power delivery network where the buried power rail and the first metal layer are composed of the same conductive material. The semiconductor structure includes a portion of an interlayer dielectric material isolating the first metal layer of the backside power distribution network from the backside of the semiconductor substrate.