Hybrid Buried Power Rail Layout for Front-Side Area Recovery

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Solution Overview

Problem

Conventional chip manufacturing methods limit the usable area for circuit elements due to the need to route power delivery elements on the front side, restricting flexibility and efficiency in circuit design as the intermediate areas under device regions are unusable for additional components.

Innovation Solution

Implementing a hybrid buried power rail structure with dual front side and backside processing, utilizing conductive power rails positioned beneath the substrate surface to enable power delivery from the back side, allowing for parallel routing and increased flexibility in power and ground line placement without interfering with electronic devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If power delivery elements are routed on the front side of the device, then power can be delivered to processing elements, but the intermediate areas under device regions become unusable for additional components

Engineering Contradiction:

Improvepower delivery capabilityVSAvoidusable area for circuit elements

Core Design Contradiction:

ProductivityVSArea of stationary object

Solution Approach 1:

The patent moves power delivery elements from the traditional front-side (two-dimensional plane) to the back-side of the substrate, utilizing the third dimension (depth/vertical space) to resolve the area conflict. By routing power rails and ground rails on the back surface and connecting them to front-side pads through vertical vias, the design frees up front-side intermediate areas for additional circuit elements while maintaining power delivery functionality.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If material is deposited from the front side to form processing elements, then electronic processing elements can be formed, but the area under device regions cannot be used for other elements

Engineering Contradiction:

Improveprocessing element formationVSAvoidflexibility in element placement

Core Design Contradiction:

Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent segments the substrate into distinct front-side and back-side functional regions. The front side is dedicated to processing elements formed through conventional top-down deposition, while the back side is dedicated to power and ground rails. This segmentation allows each side to be optimized independently, maintaining ease of manufacture for processing elements while gaining versatility in overall device layout and element placement flexibility.

Inventive Principle:

Principle #1Segmentation

3Reliability

If conventional front-side routing is used for power delivery, then power can be delivered to devices, but circuit design flexibility is restricted

Engineering Contradiction:

Improvepower delivery reliabilityVSAvoidcircuit design flexibility

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent inverts the conventional approach by routing power and ground rails on the back side of the substrate rather than the front side. This inversion allows power delivery to occur beneath the active circuit region, enabling designers to place pads and interconnects on the front side without being constrained by power routing requirements, thereby significantly improving circuit design flexibility while maintaining reliable power delivery through the substrate.

Inventive Principle:

Principle #13The other way round (Inversion)

Data Source

PatentUS12550713B2Hybrid buried power rail structure with dual front side and backside processing

Publication Date: 2026.02.10 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

A semiconductor device includes a semiconductor substrate having a top surface and a bottom surface. An electronic device is integrated into the top surface of the semiconductor substrate. A conductive power rail is positioned intermediate the top surface and the bottom surface of the semiconductor substrate. The conductive power rail is configured to conduct power to the electronic device.