Buried Power Rail in Semiconductor Device
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Solution Overview
Problem
In semiconductor devices, the conventional placement of power rails above the active layer occupies space that could be used for routing tracks, leading to reduced space for interconnections and increased IR drops due to the use of Vias for power distribution.
Innovation Solution
A buried power rail is integrated at the same level as the active layer, below the metal routing layers, eliminating the need for Vias and allowing for increased routing tracks and reduced IR drops by direct electrical connection to contacts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the power rail is arranged in a metal layer above the interconnection layer, then the power distribution is achieved, but the space for routing tracks is reduced
Solution Approach 1:
The power rail is moved from the vertical dimension (metal layer M1) to the horizontal dimension (interconnection layer M0), allowing it to coexist with routing tracks in different spatial planes rather than competing for the same layer space
Solution Approach 2:
The power rail is integrated into the interconnection layer structure, effectively copying the layer organization of signal interconnections and treating power distribution as another interconnection function within the same plane
2Reliability
If a Via is used to connect the power rail to the active layer, then electrical connection is achieved, but IR drop increases
Solution Approach 1:
The Via connection element is extracted and eliminated from the power distribution path by integrating the power rail directly into the interconnection layer, removing the source of additional resistance and IR drop
Solution Approach 2:
The power rail and interconnection layer are merged into a single integrated structure, combining power distribution and signal routing functions into one continuous conductive plane without discontinuities
3Device complexity
If the power rail occupies the same level as routing tracks, then power distribution is simplified, but the number of available routing tracks decreases
Solution Approach 1:
The power rail is repositioned to the interconnection layer M0, creating a dimensional separation where power distribution and signal routing operate in the same layer but with distinct functional zones, increasing overall routing capacity
Data Source
AI summary
A semiconductor device includes: a substrate; a power rail on the substrate; an active layer on the substrate and at same layer as the power rail; and a contact electrically connecting the power rail to the active layer. The active layer includes source/drain terminals.


