Buried Power Rails with Integrated Decoupling for Stable IC Power
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Solution Overview
Problem
The scaling of transistors and wires in advanced semiconductor technologies beyond the 5-nm node leads to severe design challenges, including short-channel effects and increased wire/contact resistances, while the integration of buried power rails (BPRs) necessitates effective power supply stabilization without occupying precious chip area.
Innovation Solution
Integrating decoupling capacitors with BPRs, where BPRs serve as electrodes of the capacitor, providing a capacitance of at least 1 fF/μm, and utilizing through-substrate vias to connect to separate capacitors, reducing connection resistance and eliminating the need for buffer capacitances on the chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate buffer capacitances are integrated on the chip to stabilize power supply, then power supply stability is improved, but chip area is increased
Solution Approach 1:
The patent merges the power rail and buffer capacitance into a single integrated structure. The buried power rail (BPR) is combined with decoupling capacitance to form an integrated power delivery unit, eliminating the need for separate buffer capacitance components on the chip. This integration maintains power supply stability while reducing the area occupied by discrete capacitor components.
Solution Approach 2:
The buried power rail structure serves multiple functions simultaneously: it provides power delivery and also functions as the capacitor electrode. The BPR structure is designed to perform both power distribution and energy storage functions, reducing the need for dedicated buffer capacitance components and minimizing chip area usage.
2Productivity
If transistor size is scaled down to increase functional density, then area scaling is improved, but wire and contact resistances increase
Solution Approach 1:
The patent transitions from planar power delivery to three-dimensional buried power rails. By extending the power delivery network into the vertical dimension with BPRs positioned beneath the active circuit layer, the design compensates for increased lateral resistance in scaled-down interconnects. This vertical power delivery path provides additional current supply routes, reducing the impact of high wire and contact resistances in miniaturized devices.
3Productivity
If buried power rails are implemented to enable further scaling, then area scaling is improved, but power supply stabilization becomes more challenging
Solution Approach 1:
The patent combines the power rail and decoupling capacitance into an integrated BPR structure. This merger allows the power delivery network to inherently provide power supply stabilization without requiring separate buffer components, thus maintaining scaling benefits while solving the stabilization challenge.
Solution Approach 2:
The buried power rail structure provides self-service power supply stabilization through its integrated decoupling capacitance. The BPR structure inherently supplies local charge storage and power regulation without requiring external buffer capacitance components, enabling autonomous power management in scaled devices.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach stabilizes the power supply effectively, reduces chip area usage, and enhances area scaling by minimizing resistance and buffer capacitance requirements.
Implementation Method 1
The decoupling capacitor includes a first and a second buried power rails (BPRs) and a dielectric element between the BPRs
Implementation Method 2
The decoupling capacitor includes a first and a second buried power rails (BPRs) and a dielectric element between the BPRs
Data Source
AI summary
IC devices including BPRs with integrated decoupling capacitance are disclosed. An example IC device includes a first layer comprising a transistor and a support structure adjoining the first layer. The support structure includes BPRs, which are power rails buried in the support structure, and a decoupling capacitor based on the BPRs. The conductive cores of the BPRs are the electrodes of the decoupling capacitor. The dielectric barriers of the BPRs can be the dielectric of the decupling capacitor. The dielectric of the decupling capacitor may also include a dielectric element between the BPRs. Additionally or alternatively, the IC device includes another decoupling capacitor at the backside of the support structure. The other decoupling capacitor is coupled to the BPRs and can provide additional decoupling capacitance for stabilizing power supply facilitated by the BPRs.