Buried SiC Edge Termination for Reliability
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Solution Overview
Problem
Silicon carbide devices face high electrical field stress at the semiconductor surface, leading to potential degradation and reliability issues due to high breakdown fields, which existing edge termination methods fail to adequately address.
Innovation Solution
A silicon carbide device with a buried lateral edge termination region covered by a silicon carbide surface layer, reducing electrical fields and protecting the edge termination from degradation, thereby enhancing breakdown behavior and long-term reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the edge termination is exposed at the surface, then the manufacturing is simpler, but the edge termination suffers from degradation and oxidation leading to poor reliability
Solution Approach 1:
The edge termination region is nested within the semiconductor device structure by burying it below the surface. A first semiconductor layer with first conductivity type is formed over the edge termination region, effectively enclosing the sensitive termination region within the device structure, protecting it from environmental degradation while maintaining electrical functionality.
Solution Approach 2:
The solution transitions from a two-dimensional surface-level edge termination to a three-dimensional buried structure. By adding the vertical dimension with the first semiconductor layer covering the edge termination region, the design moves the termination from surface exposure to subsurface embedding, simultaneously achieving protection and electrical performance.
2Reliability
If a buried edge termination is implemented, then the reliability and temperature stability are improved, but the device complexity increases
Solution Approach 1:
The first semiconductor layer with first conductivity type serves multiple functions simultaneously: it acts as a protective cap over the buried edge termination region, provides additional electrical field management, and functions as an integral part of the semiconductor device structure. This multi-functionality reduces the need for separate protective layers, thereby limiting the increase in device complexity.
Solution Approach 2:
The conductivity type parameter of the first semiconductor layer is specifically selected to match or complement the edge termination region requirements. By optimizing the conductivity type, doping concentration, and thickness parameters of the first semiconductor layer, the structure achieves effective protection and electrical performance without requiring excessive structural complexity.
3Reliability
If the electrical field at the surface is reduced, then the breakdown behavior is improved, but additional layers or structures are required increasing complexity
Solution Approach 1:
The first semiconductor layer is specifically positioned and configured to address the local electrical field conditions at the edge termination region. By tailoring the conductivity type, thickness, and spatial distribution of this layer to the specific needs of the buried edge termination, the solution locally optimizes the electrical field distribution to improve breakdown behavior without requiring global structural changes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The buried lateral edge termination region effectively reduces surface electrical fields and prevents degradation, improving breakdown behavior and long-term reliability by burying the edge termination below the surface layer, achieving high temperature stability and moisture resistance.
Implementation Method 1
the depletion zone of the p-n-junction of the buried lateral silicon carbide edge termination region and the silicon carbide surface layer extends at least at one point up to the surface of the silicon carbide surface layer
Data Source
AI summary
A silicon carbide device includes an epitaxial silicon carbide layer including a first conductivity type and a buried lateral silicon carbide edge termination region located within the epitaxial silicon carbide layer including a second conductivity type. The buried lateral silicon carbide edge termination region is covered by a silicon carbide surface layer including the first conductivity type.