Buried Thermistor Stack Structure for High Thermal Sensitivity
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Solution Overview
Problem
Conventional buried resistors in electronic devices face limitations in achieving high resistance with minimal area and weight, particularly in high circuit density applications, due to restricted material selection and large area requirements for nickel-based resistors with high temperature coefficient of resistance (TCR).
Innovation Solution
The development of a buried thermistor structure with multiple thermistor stacks, each comprising a base layer, medium layer, resistor layer, metal layer, nanometal layer, and conductive layer, where the metal layer is recessed and the nanometal layer extends through-hole vias, allowing for variable thermal sensitivity and reduced resistor region area by using materials with high coefficient of thermal expansion (CTE) and diverse resistor materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If nickel-based resistors with high TCR are used, then thermal sensitivity is improved, but area requirement increases
Solution Approach 1:
The patent divides the resistor structure into multiple segments including a base layer, medium layer, resistor layer, metal layer, and nanometal layer. This segmentation allows each layer to contribute differently to the overall thermal sensitivity while maintaining a compact footprint, resolving the contradiction between high thermal sensitivity and small area requirement
Solution Approach 2:
The patent employs composite material structure with multiple layers having different thermal and electrical properties. The combination of base layer, medium layer, resistor layer, metal layer, and nanometal layer creates a composite structure that achieves high thermal sensitivity (TCR) in a minimized area by leveraging the synergistic effects of different materials
2Ease of manufacture
If conventional buried resistor structure is used, then manufacturing simplicity is maintained, but material selection is restricted
Solution Approach 1:
The resistor is segmented into multiple functional layers (base layer, medium layer, resistor layer, metal layer, nanometal layer) that can be manufactured using standard PCB processes. This segmentation enables diverse material selection for each layer while maintaining compatibility with conventional manufacturing methods, thus preserving manufacturing simplicity while expanding material versatility
Solution Approach 2:
The composite multi-layer structure allows different materials to be selected for each layer based on specific performance requirements. The base layer can use conventional substrates, while the resistor layer, metal layer, and nanometal layer can incorporate various materials with different electrical and thermal properties, all manufacturable through existing PCB technologies
3Area of stationary object
If high circuit density is achieved, then area is reduced, but thermal sensitivity management becomes difficult
Solution Approach 1:
By segmenting the resistor into multiple thin layers, the patent achieves high circuit density and area reduction while the segmented structure allows independent optimization of thermal properties for each layer. This enables precise control of thermal sensitivity even in compact high-density configurations
Solution Approach 2:
The composite multi-layer structure provides degrees of freedom for thermal management. Different layers can be designed with specific thermal conductivities and expansion coefficients, allowing thermal sensitivity to be controlled and optimized even when the overall device area is minimized for high circuit density
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances thermal sensitivity and reduces the area of the resistor region, allowing for diverse material selection and efficient thermal response, overcoming the limitations of conventional resistors in high-density electronic circuits.
Implementation Method 1
using materials with high coefficient of thermal expansion (CTE) and diverse resistor materials
Data Source
AI summary
A buried thermistor includes a lower substrate, an upper substrate, and a number of thermistor stacks. Each thermistor stack includes two resistor subjects. Each resistor subject includes a base layer, a medium layer, a metal layer, a resistor layer, a nanometal layer, and a conductive layer. Applicable material of the resistor layer becomes more diverse by disposing the number of thermistor stacks, and the buried thermistor shows variable thermal sensitivity.


