Buried Trench Gate Structure for Higher Cell Density
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Solution Overview
Problem
Existing semiconductor devices face challenges in achieving high current density, low turn-on voltage, high breakdown voltage, low leakage current, and fast switching speed simultaneously, due to the trade-off relationships between these electrical characteristics.
Innovation Solution
The semiconductor device employs a buried gate electrode structure where the gate electrode is disposed only inside the trench, and a gate recess process is used to form the buried gate electrode structure without a separate mask, allowing for a lower gate runner formation and reduced cell pitch.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a trench gate structure is used to reduce on-resistance, then current density is improved, but cell pitch increases
Solution Approach 1:
The gate electrode is moved from a planar configuration to a three-dimensional trench structure, utilizing the vertical dimension to increase effective gate area without expanding the horizontal cell pitch. The gate electrode extends into the trench depth direction, providing additional control area while maintaining compact planar dimensions.
Solution Approach 2:
The gate electrode is nested within the trench structure, with the gate runner positioned in the termination region and the gate electrode extending downward into the trench. This nested arrangement allows the gate control structure to be embedded within the device volume rather than occupying additional planar space.
2Quantity of substance
If a buried gate structure is used to improve cell density, then manufacturing complexity increases
Solution Approach 1:
The gate runner is formed in the termination region before the gate electrode is deposited into the trench. This preliminary formation of the gate runner structure provides a pre-established pathway and support structure that guides subsequent gate electrode deposition, simplifying the overall manufacturing sequence.
Solution Approach 2:
The gate runner structure serves multiple functions: it provides electrical connection to the gate electrode, acts as a structural support in the termination region, and defines the boundary between the conductive and termination regions. This multi-functionality reduces the need for separate dedicated structures.
3Length of moving object
If the gate electrode is disposed only inside the trench, then cell pitch is reduced, but gate electrode formation difficulty increases
Solution Approach 1:
The gate runner is formed in advance in the termination region, creating a pre-established structure that guides and supports the subsequent gate electrode deposition. This preliminary structure makes it easier to control the gate electrode formation process within the trench.
Solution Approach 2:
The gate runner acts as an intermediary structure between the termination region and the gate electrode in the trench. It provides a transition zone that facilitates the controlled deposition and positioning of the gate electrode within the trench structure.
Data Source
AI summary
An embodiment semiconductor device includes a conductive region extending in a first direction and a second direction intersecting the first direction and stacked in a third direction intersecting the first direction and the second direction and a termination region at an end of the conductive region in the first direction, wherein the termination region includes an n+ type substrate, an n− type layer disposed on an upper surface of the n+ type substrate and having a plurality of first trenches opening upward in the third direction, and a lower gate runner covering the plurality of first trenches and disposed on an upper surface of the n− type layer.