Buried Tunnel Junction for III-Nitride Photonic Integration
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Solution Overview
Problem
The development of N-polar photonic and electronic devices is hindered by challenging growth specifics, oxygen contamination, lower chemical stability, and high resistance of p-type layers, which complicates etching and post-growth processing, limiting their efficiency and integration with other devices.
Innovation Solution
A buried tunnel junction is grown below the device structure on a metal(III)-polar III-nitride substrate, allowing for the formation of a p-type III-nitride layer directly on an n-type layer, with subsequent layers patterned into structures like nanopillars, enabling easier processing and integration with other devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If N-polar structures with buried n-layers are used to improve injection efficiency and reduce threshold currents, then device performance is improved, but growth complexity and oxygen contamination increase
Solution Approach 1:
The patent inverts the conventional N-polar structure by using a Ga-polar substrate with a buried p-type layer instead of a buried n-layer. This inversion maintains the beneficial internal electric field alignment for improved injection efficiency while avoiding the growth complexity and oxygen contamination issues associated with N-polar structures. The p-type layer is positioned at the bottom rather than the top, fundamentally changing the device architecture.
Solution Approach 2:
The patent changes the polarity parameter from N-polar to Ga-polar orientation and modifies the doping type in the buried layer from n-type to p-type. These parameter changes enable the device to achieve high injection efficiency through proper electric field alignment while being compatible with standard Ga-polar growth processes that have well-established fabrication procedures and lower contamination risks.
2Reliability
If N-polar growth is used to achieve proper polarization alignment, then device performance is improved, but chemical stability and etching difficulty increase
Solution Approach 1:
The patent inverts the growth orientation from N-polar to Ga-polar, which reverses the polarity-related manufacturing challenges. Ga-polar growth maintains good chemical stability and etching characteristics that are well-established in existing fabrication processes, while still achieving proper polarization alignment through the inverted structure with the buried p-type layer.
3Ease of manufacture
If Ga-polar substrates are used to improve chemical stability and ease of processing, then manufacturing is simplified, but N-polar device performance is lost
Solution Approach 1:
The patent uses Ga-polar substrates for improved chemical stability and manufacturing ease, and through the inverted structure with a buried p-type layer, achieves proper polarization alignment and electric field optimization. This inversion allows Ga-polar substrates to be used while still obtaining the performance benefits previously only available from N-polar structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for higher injection efficiency, reduced resistance, and improved chemical stability, enabling efficient etching and integration of N-polar devices with Ga-polar substrates, facilitating the use of N-polar devices in various applications, including LEDs and transistors, while maintaining compatibility with existing Ga-polar substrate technology.
Implementation Method 1
tunnel junction formed on one of the first surface or a buffer layer disposed on the first surface
Data Source
AI summary
A device that includes a metal(III)-polar III-nitride substrate having a first surface opposite a second surface, a tunnel junction formed on one of the first surface or a buffer layer disposed on the first surface, a p-type III-nitride layer formed directly on the tunnel junction, and a number of material layers; a first material layer formed on the p-type III-nitride layer, each subsequent layer disposed on a preceding layer, where one layer from the number of material layers is patterned into a structure, that one layer being a III-nitride layer. Methods for forming the device are also disclosed.