Buried Well Contact Layout for Submicron Alignment and Low Resistance
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Solution Overview
Problem
As semiconductor feature sizes decrease, challenges arise in fabricating contacts to buried well devices due to increased difficulty in lithography, crosstalk, capacitive loading, and heat dissipation, along with tighter manufacturing tolerances and higher access resistance, which require innovative methods to reduce implant straggle and improve contact alignment.
Innovation Solution
A method involving the formation of shallow trench isolation cavities, low-energy dopant implantation, and self-aligned contact deposition using a single lithography step, which reduces lateral straggle and enables submicron contact fabrication to buried wells in Si/SiGe field-effect devices, allowing for improved alignment and reduced device footprint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes are reduced to increase transistor density, then chip density and power efficiency are improved, but manufacturing precision and lithography difficulty worsen
Solution Approach 1:
The patent segments the contact formation process into multiple controlled steps: forming isolation structures, etching cavities, implanting dopants, and depositing metal contacts. This segmentation allows each step to be optimized independently for submicron precision, addressing the manufacturing precision challenge while maintaining high transistor density
Solution Approach 2:
The patent performs preliminary actions by forming isolation structures and cavities before contact deposition, and implanting dopants at specific energy levels before metal contact formation. These preliminary steps establish precise geometric constraints and doping profiles that enable subsequent submicron contact fabrication with tight tolerances
2Length of stationary object
If dopants are implanted at high energy to form buried wells, then doping depth is achieved, but lateral straggle increases reducing manufacturing precision
Solution Approach 1:
The patent changes the energy parameter of dopant implantation to low energy levels, which fundamentally alters the doping profile characteristics. This parameter change achieves the desired doping depth while minimizing lateral straggle, thereby maintaining manufacturing precision in submicron features
Solution Approach 2:
The patent introduces an intermediary step of forming a cavity and isolating the implantation region before dopant implantation. This intermediary structure confines the dopant distribution and reduces lateral spread, enabling precise control of both doping depth and lateral straggle
3Manufacturing precision
If multiple lithography steps are used for contact alignment, then alignment precision can be improved, but device complexity and manufacturing time increase
Solution Approach 1:
The patent merges the cavity formation and contact alignment steps into a single lithography process. By using the same lithographic pattern for both the cavity definition and the subsequent contact formation, the patent achieves precise alignment without requiring multiple separate lithography steps, thereby reducing device complexity and manufacturing time
Solution Approach 2:
The patent makes the lithographic step universal by using it to define both the cavity geometry and the contact position in a single process. This multi-functionality eliminates the need for separate alignment steps, simplifying the overall fabrication process while maintaining submicron alignment precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces access resistance and implant straggle, enabling the fabrication of submicron contacts that are closer to the device core, thereby enhancing signal lines and charge accumulation areas while maintaining desired doping levels and reducing the device footprint.
Implementation Method 1
Dopants are implanted into the cavity at a low energy level that reduces a lateral straggle of the dopants to a desired level
Data Source
AI summary
A method for forming a semiconductor structure. Two isolation structures are formed in a semiconductor. A cavity is etched in the semiconductor between the two isolation structures in the semiconductor. Dopants are implanted into a bottom side of the cavity to form a doped region in the semiconductor below the cavity between the two isolation structures. A contact is formed in the cavity. The contact is on the doped region and in direct contact with the doped region.