Buried-Wiring ESD Diode Layout for Miniaturized Semiconductor Devices
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Solution Overview
Problem
Configurations of semiconductor devices incorporating ESD protection circuits using buried wirings, such as BPR, have not been thoroughly studied or implemented effectively.
Innovation Solution
A semiconductor device design that includes a substrate with a circuit region featuring power supply wiring, ground wiring, and signal lines, with a diode connected between the signal line and either the power supply wiring or ground wiring, where the diode has impurity regions of different conductive types, facilitating the implementation of an ESD protection circuit with buried wiring.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If power supply wirings are buried in the substrate (BPR structure), then device miniaturization is enabled and layout flexibility is improved, but the configuration of ESD protection circuits becomes complex and unstudied
Solution Approach 1:
The ESD protection circuit is segmented into multiple discrete components: a first diode with first and second impurity regions, a second diode with third and fourth impurity regions, and multiple buried wirings (first power supply wiring, second power supply wiring, ground wiring). This segmentation allows each component to be independently configured and optimized within the substrate, resolving the complexity of integrating ESD protection with buried power rails.
Solution Approach 2:
Different regions of the substrate are assigned different functional qualities: the first diode region contains impurity regions for clamping to the first power supply wiring, the second diode region contains impurity regions for clamping to the second power supply wiring, and separate ground wiring regions provide reference potential. This local differentiation enables effective ESD protection while maintaining the miniaturized buried wiring architecture.
2Ease of manufacture
If traditional above-substrate power supply wirings are used, then ESD protection circuit configuration is straightforward, but device miniaturization and layout flexibility are limited
Solution Approach 1:
The power supply wirings are transitioned from a planar above-substrate configuration to a three-dimensional buried configuration within the substrate. The first and second power supply wirings are embedded at different depths and locations within the substrate, with associated impurity regions positioned to provide ESD clamping functionality. This dimensional transition enables miniaturization while maintaining ESD protection capability through vertical integration rather than horizontal expansion.
3Reliability
If ESD protection circuits are implemented with buried wirings, then parasitic capacitance is reduced and current uniformity is improved, but the circuit configuration becomes unstudied and complex
Solution Approach 1:
The ESD protection functionality is merged with the buried power supply wiring structure by integrating diodes directly into the substrate alongside the first and second power supply wirings and ground wiring. The impurity regions of the diodes are positioned to electrically connect with the buried wirings, creating a unified structure that simultaneously provides power distribution and ESD protection. This merging reduces parasitic capacitance by eliminating intermediate connections and improves current uniformity through direct electrical contact, while the integrated nature of the structure manages the complexity through functional consolidation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the effective implementation of an ESD protection circuit with buried wiring, suitable for miniaturization and improved current uniformity in semiconductor devices, while reducing parasitic capacitance and enhancing layout flexibility.
Implementation Method 1
The I/O cell region may be provided with an ESD (Electro-Static Discharge) protection circuit to suppress breakdown of the internal circuit region due to static electricity
Implementation Method 2
The first diode has a first impurity region of a first conductive type, electrically connected to the signal line, and a second impurity region of a second conductive type, different from the first conductive type, electrically connected to the first wiring
Data Source
AI summary
A semiconductor device includes a substrate; a circuit region provided with a power supply wiring, a ground wiring, and a signal line; and a first diode connected between the signal line and a first wiring. The first wiring is one of the power supply wiring and the ground wiring. The first diode includes a first impurity region of a first conductive type, electrically connected to the signal line, and a second impurity region of a second conductive type, different from the first conductive type, electrically connected to the first wiring. The signal line, the first wiring, or both is formed in the substrate.