Buried Word and Digit Lines in DRAM Fabrication
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Solution Overview
Problem
Conventional semiconductor DRAM memory array fabrication faces challenges in densely packing capacitor structures and accessing them electrically, particularly due to complex storage node contact processes and difficulties in isolating digit lines from adjacent cell contacts, leading to potential shorting issues as integrated circuit designs become denser.
Innovation Solution
The method involves forming a semiconductor substrate with line-shaped active areas and trench isolation regions, burying word lines and digit lines at angled intersections, and creating storage nodes between buried digit lines, which simplifies the fabrication process by eliminating the need for storage node contacts and reducing the risk of shorting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If storage node contact process is used for interconnection between storage node and active area, then electrical connection is achieved, but process complexity increases and shorting risk increases
Solution Approach 1:
The invention extracts and eliminates the storage node contact structure from the conventional memory device architecture. By forming buried digit lines that directly intersect with active areas at angled orientations, the patent removes the need for separate cell contacts, thereby simplifying the fabrication process and reducing the number of process steps while maintaining reliable electrical interconnection between storage nodes and digit lines
Solution Approach 2:
The patent introduces angled intersections (non-perpendicular orientations) between buried digit lines and active areas, representing a dimensional change from conventional perpendicular arrangements. This angular approach allows digit lines to pass through active areas at optimized angles, enabling direct electrical connection without requiring additional cell contact structures, thus reducing process complexity while maintaining connection reliability
2Reliability
If digit line is isolated from adjacent cell contact, then shorting is prevented, but fabrication difficulty increases
Solution Approach 1:
By removing the cell contact structure entirely and replacing it with angled buried digit line intersections, the invention eliminates the isolation challenge. The angled orientation naturally positions digit lines away from adjacent active areas, providing inherent spatial separation that prevents shorting without requiring additional isolation process steps
Solution Approach 2:
The patent employs asymmetric angled orientations for digit line intersections with active areas, rather than symmetric perpendicular arrangements. This asymmetric approach creates natural spacing and angular separation between digit lines and adjacent structures, providing built-in protection against shorting while simplifying the manufacturing process by eliminating complex isolation requirements
3Productivity
If active area is maximized for storage nodes, then device density increases, but isolation from digit lines becomes more difficult
Solution Approach 1:
The patent utilizes angled intersections between buried digit lines and active areas, changing the geometric relationship from conventional perpendicular to oblique angles. This dimensional change allows digit lines to traverse active areas while maintaining adequate spacing from adjacent structures, enabling maximized active area utilization for storage nodes without compromising isolation precision or increasing manufacturing difficulty
Data Source
AI summary
A method for fabricating a memory array includes providing a semiconductor substrate having thereon a plurality of line-shaped active areas and intermittent line-shaped trench isolation regions between the plurality of line-shaped active areas, which extend along a first direction; forming buried word lines extending along a second direction in the semiconductor substrate, the buried word lines intersecting with the line-shaped active areas and the intermittent line-shaped trench isolation regions, wherein the second direction is not perpendicular to the first direction; forming buried digit lines extending along a third direction in the semiconductor substrate, wherein the third direction is substantially perpendicular to the second direction; and forming storage nodes at storage node sites between the buried digit lines.