Semiconductor Buried Word Line Isolation Structure Design
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Solution Overview
Problem
In semiconductor device manufacturing, the formation of buried word lines causes size reduction of active areas and potential short circuits due to wet and thermal processes, leading to increased write recovery time and reduced operating speed.
Innovation Solution
A semiconductor structure with first and second isolation structures of different materials, where the second isolation structure is formed after the buried word line, reducing thermal processes and preventing size reduction and short circuits, and a manufacturing method that includes forming first isolation structures, a buried word line, and then the second isolation structure to intersect the first, using distinct materials to maintain active area size and prevent short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wet cleaning process and thermal process are used during buried word line formation, then the isolation structures are expanded, but the active area size is reduced
Solution Approach 1:
The isolation structure formation is divided into two separate stages: first isolation structures are formed before the buried word line, and second isolation structures are formed after the buried word line. This segmentation allows each isolation structure to serve different functions and be processed at different times, preventing the expansion problem.
Solution Approach 2:
The first isolation structures are formed preliminarily before the buried word line formation process. This preliminary action establishes the isolation boundaries before the thermal and wet cleaning processes occur, so these processes cannot expand the isolation structures and reduce the active area.
2Reliability
If thermal processes are applied during buried word line formation, then the isolation structures are affected, but recesses are formed on the isolation structures
Solution Approach 1:
The isolation structures are segmented into first and second isolation structures formed at different times. The second isolation structures are formed after the buried word line, so they do not undergo the thermal processes that cause recesses, maintaining their surface flatness.
Solution Approach 2:
The first isolation structures are formed preliminarily and can undergo thermal processes during buried word line formation. The second isolation structures are formed later to protect against recess formation, as they are not exposed to the same thermal processes.
3Reliability
If conductive material remains in the recess of isolation structures, then short circuit between contacts occurs
Solution Approach 1:
By dividing the isolation structures into first and second isolation structures formed at different stages, the patent eliminates the recess problem that would trap conductive material. The second isolation structures formed after the buried word line have flat surfaces that prevent conductive material accumulation, thereby preventing short circuits between contacts.
4Area of stationary object
If active area size is reduced, then contact area between contact and active area is reduced, but resistance value increases
Solution Approach 1:
The patent segments the isolation structure formation into two stages, with first isolation structures formed before the buried word line and second isolation structures formed after. This ensures the active area maintains its designed size without expansion of isolation structures, preserving adequate contact area and low resistance values.
Data Source
AI summary
A semiconductor structure includes a substrate, and first isolation structures, at least one buried word line and at least one second isolation structure which are disposed in the substrate. The buried word line intersects the first isolation structures. The second isolation structure intersects the first isolation structures. A material of at least a portion of the second isolation structure is different from a material of the first isolation structures.