Burst-Mode Clock Recovery with Frequency Pre-Adjustment
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Solution Overview
Problem
Implementing clock data recovery technology in passive optical networks with high symmetric transmission rates is a pressing technical challenge, as existing solutions face difficulties in efficiently recovering clock signals and reducing locking time.
Innovation Solution
A clock data recovery apparatus that adjusts its frequency oscillation unit before data stream arrival, utilizing a phase detection loop and frequency detection loop with components like delay lines, mixers, and voltage-to-current converters to quickly synchronize with the data stream signal, and includes a frequency division unit to reduce complexity and costs by using a reference clock signal with a lower frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional clock data recovery methods are used in passive optical networks with high symmetric transmission rates, then the system can maintain stability and reliability, but the clock signal locking time is excessively long and working efficiency is low
Solution Approach 1:
The patent applies preliminary action by performing frequency pre-adjustment using a frequency detection loop before the data stream arrives. The frequency oscillation unit is pre-configured based on reference clock signals, so when the burst data stream arrives, the system is already close to the correct frequency, dramatically reducing the locking time required by traditional phase-locked loops.
Solution Approach 2:
The patent segments the clock data recovery process into two distinct stages: a frequency detection stage (before data arrival) and a phase detection stage (after data arrival). This segmentation allows each stage to optimize for its specific function, with the frequency detection loop handling coarse frequency adjustment and the phase detection loop handling fine phase synchronization, thereby improving overall efficiency.
2Loss of time
If the frequency oscillation unit is adjusted after data stream arrival, then the system maintains simplicity, but the locking time is long and working efficiency is reduced
Solution Approach 1:
The system performs frequency pre-adjustment using a frequency detection loop before the data stream arrives. The frequency oscillation unit is pre-configured based on reference clock signals, so when the burst data stream arrives, the system is already close to the correct frequency, dramatically reducing the locking time required.
Solution Approach 2:
The patent changes the operating parameters of the frequency oscillation unit dynamically. Before data arrival, the system uses reference clock signals to pre-adjust the frequency parameter. After data arrival, it switches to using the actual data stream for phase detection, optimizing performance for each operational phase.
3Measurement precision
If a reference clock signal with the same frequency as the data stream is used, then frequency accuracy is maximized, but system complexity and costs increase
Solution Approach 1:
The patent changes the frequency parameter of the reference clock signal to be lower than the data stream frequency. The frequency detection loop compensates for this difference by detecting the frequency offset and adjusting the frequency oscillation unit accordingly, achieving accurate frequency locking without requiring a high-frequency reference clock signal.
Solution Approach 2:
The frequency detection loop acts as an intermediary between the low-frequency reference clock signal and the frequency oscillation unit. It detects the frequency offset and generates appropriate adjustment signals, enabling the system to use a simpler, lower-frequency reference clock while still achieving accurate frequency synchronization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The apparatus significantly reduces clock signal locking time, improves working efficiency, and can handle data stream signals across a larger frequency range, while tolerating consecutive identical digits and adjusting delays for accurate data recovery.
Implementation Method 1
a delay line configured to delay the data stream signal
Implementation Method 2
a mixer configured to mix a delayed data stream signal and a clock signal to determine a phase difference between the delayed data stream signal and the clock signal
Implementation Method 3
a voltage-to-current converter configured to convert the phase difference to a current signal
Implementation Method 4
a low-pass filter configured to filter the current signal to generate the adjustment signal
Data Source
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AI summary
This application provides a clock data recovery apparatus, an optical line terminal, and a passive optical network communications system. The clock data recovery apparatus includes a phase detection loop unit, a frequency oscillation unit, a frequency detection loop unit, and a data collection unit. The frequency detection loop unit is configured to: when a data stream signal is not input to the clock data recovery apparatus, determine a first frequency difference between a reference clock signal and a signal output by the frequency oscillation unit, and convert the first frequency difference to a first voltage signal. The frequency oscillation unit is configured to: oscillate the first voltage signal, and output a signal obtained by oscillating the first voltage signal. The phase detection loop unit is configured to: when a data stream signal is input to the clock data recovery apparatus, determine a phase difference between the data stream signal and a signal output by the frequency oscillation unit, and convert the phase difference to a second voltage signal. The frequency oscillation unit is further configured to: oscillate the second voltage signal, and output a signal obtained by oscillating the second voltage signal. The clock data recovery apparatus, the optical line terminal, and the passive optical communications system that are provided in this application can implement a clock data recovery technology.